公开(公告)号：US20170083439A1

公开(公告)日：2017-03-23

申请号：US14860744

申请日：2015-09-22

Applicant: Macronix International Co., Ltd.

Inventor： Kuen-Long CHANG ,  Su-Chuch LO ,  Chao Hsin LIN ,  Ken-Hui CHEN

IPC: G06F12/06

CPC classification number: G06F12/0646 ,  G06F2212/1016

Abstract: A memory device includes an input/output interface configured to receive and output signals. The input/output interface is configured to receive a memory address to be accessed and data sequence information within a clock cycle or at a rising or falling edge of a clock cycle. The data sequence information specifies an input or output data sequence.