Scalable, reconfigurable GPS receiver
    1.
    发明授权
    Scalable, reconfigurable GPS receiver 有权
    可扩展的,可重新配置的GPS接收机

    公开(公告)号:US06646595B1

    公开(公告)日:2003-11-11

    申请号:US10216011

    申请日:2002-08-09

    IPC分类号: G01S502

    CPC分类号: G01S19/09 H04B1/3805

    摘要: A GPS receiver (26) for processing GPS satellite signals and adapted for connection to a client device (24). The receiver (26) includes a down converter (44), a correlator (46), and a microcomputer A. The microcomputer A has a microprocessor A, a first memory (48A), a second memory (48B, 148B), and an input/output interface (50). The input/output interface (50) is capable of being connected to the client device (24). The first memory (48A) contains a first set of instructions for the microprocessor A to download and store in the second memory (48B, 148B) at least one time critical GPS software module (A1, A2, . . . AN) from the client device (24). The first memory (48A) also contains a second set of instructions for the microprocessor A to determine whether to download and store in the second memory (48B, 148B) a plurality of non-time critical software modules (B1, B2, . . . BN) from the client device (24).

    摘要翻译: 一种用于处理GPS卫星信号并适于连接到客户设备(24)的GPS接收器(26)。 接收器(26)包括下变频器(44),相关器(46)和微型计算机A.微计算机A具有微处理器A,第一存储器(48A),第二存储器(48B,148B)和 输入/输出接口(50)。 输入/输出接口(50)能够连接到客户端设备(24)。 第一存储器(48A)包含第一组指令,用于微处理器A从客户端下载和存储至少一个关键的GPS软件模块(A1,A2 ...,AN)到第二存储器(48B,148B) 装置(24)。 第一存储器(48A)还包含第二组指令,用于微处理器A确定是否在第二存储器(48B,148B)中下载和存储多个非时间关键软件模块(B1,B2,..., BN)。

    Method and apparatus for post-correlation scoring circuit
    2.
    发明授权
    Method and apparatus for post-correlation scoring circuit 失效
    后相关评分电路的方法和装置

    公开(公告)号:US5274675A

    公开(公告)日:1993-12-28

    申请号:US850375

    申请日:1992-03-12

    CPC分类号: G06F17/15 G01S19/24

    摘要: An apparatus for post-correlation signal processing includes a plurality of correlators for correlating a received signal with a predetermined signal to produce a plurality of correlator output signals and a selection circuit coupled to the plurality of correlators for selecting a correlator output signal from one of the plurality of correlator output signals to provide a selected correlator output signal. A memory is coupled to the selection circuit for storing post correlation totals. A counter is coupled to the memory for synchronizing the memory with the predetermined signal. An adder is coupled to the memory and to the selection circuit for combining the selected correlator output signal with the post correlation total from the memory to form a new post correlation total. The memory replaces the previous post correlation total with the new post correlation total.

    摘要翻译: 用于后置相关信号处理的装置包括多个相关器,用于将接收信号与预定信号相关,以产生多个相关器输出信号;以及选择电路,耦合到多个相关器,用于从相关器输出信号 多个相关器输出信号以提供所选择的相关器输出信号。 存储器耦合到选择电路以存储后相关总数。 计数器耦合到存储器,用于使存储器与预定信号同步。 加法器耦合到存储器和选择电路,用于将所选择的相关器输出信号与来自存储器的后相关总数组合以形成新的后相关总数。 存储器替换之前的后相关总数与新的后相关总数。

    Symbol state trellis maximum likelihood detection method
    3.
    发明授权
    Symbol state trellis maximum likelihood detection method 失效
    符号状态网格最大似然检测方法

    公开(公告)号:US5128967A

    公开(公告)日:1992-07-07

    申请号:US383683

    申请日:1989-07-24

    IPC分类号: H03M13/39 H04L25/03

    摘要: A symbol state trellis maximum likelihood detection method greatly limits the number of possible interfering symbols which require examination. This method has considerable processing advantages over other optimal maximum likelihood detection methods. For practical configurations, the symbol state trellis maximum likelihood detection method provides a performance which is less than 1 dB from the optimal maximum likelihood detection method while simultaneously providing for a similar bit error rate. The symbol state trellis maximum likelihood detection method calculates the phase errors for all paths from a present state to a previous state. Next, total path distances are calculated for previously selected paths to the previous state. The phase error associated with each of the paths from two states previous to the present state are calculated. For each symbol of the present state, only one path is selected to each symbol. This path corresponds to the path with the minimum phase error. The symbol sent may then be determined by retracing the selected paths through the trellis structure for each of the M symbols.

    摘要翻译: 符号状态网格最大似然检测方法大大限制了需要检查的可能干扰符号的数量。 与其他最佳最大似然检测方法相比,该方法具有相当的处理优势。 对于实际配置,符号状态网格最大似然检测方法提供了从最佳最大似然检测方法小于1dB的性能,同时提供类似的误码率。 符号状态网格最大似然检测方法计算从当前状态到先前状态的所有路径的相位误差。 接下来,对于先前选择的到先前状态的路径计算总路径距离。 计算与来自当前状态之前的两个状态的每个路径相关联的相位误差。 对于当前状态的每个符号,仅对每个符号选择一个路径。 该路径对应于具有最小相位误差的路径。 然后可以通过针对M个符号中的每个符号通过格架结构回溯所选择的路径来确定发送的符号。