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1.发明授权公开(公告)号：US06281698B1
公开(公告)日：2001-08-28
申请号：US09467153
申请日：1999-12-20
IPC分类号： G01R3126
CPC分类号： G01R31/3191
摘要： A waveform and timing generation circuit 28, a skew circuit 30, and a pin driver 32 are provided for each of a plurality of I/O terminals 22 corresponding respectively to a plurality of pins furnished on an LSI. A relay 44 and a loop control circuit 46 are provided to feed an output signal of the pin driver 32 back to an input side of the waveform and timing generation circuit 28. A skew board 100 is used to adjust the skew circuit 30, whereby the initial timing calibration is carried out. With the skew circuit 30 thus adjusted, oscillations are generated over the feedback path, and the number of resulting pulses is counted (to obtain pulse cycles). When the skew circuit 30 is adjusted so that the pulse count above matches the number of pulses generated during oscillations, a simplified form of timing calibration is implemented.
摘要翻译： 为分别对应于LSI上提供的多个引脚的多个I / O端子22中的每一个提供波形和定时产生电路28，偏斜电路30和引脚驱动器32。 设置有继电器44和回路控制电路46，以将引脚驱动器32的输出信号反馈回波形的输入侧和定时产生电路28.偏斜板100用于调整偏斜电路30，由此， 执行初始定时校准。 通过这样调整偏斜电路30，在反馈路径上产生振荡，并且对所得到的脉冲的数量进行计数（以获得脉冲周期）。 当偏斜电路30被调整为使得上面的脉冲数与在振荡期间产生的脉冲数相匹配时，实现了简化形式的定时校准。
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公开(公告)号：US06546525B2
公开(公告)日：2003-04-08
申请号：US09761179
申请日：2001-01-18
IPC分类号： G06F1750
CPC分类号： G01R31/31908 , G01R31/31922
摘要： An LSI testing apparatus of the invention comprises: a plurality of pins P1, P2, . . . PN; function units 10, 11 and 12 which supply the pins with LSI testing signals, which have functions for making judgments on tests, and which are furnished for each of the pins; and clock mask function units 15A and 15B furnished on the input side of each function unit. Upon testing, any unused pin and function are detected so as to mask the clock mask function unit corresponding to the detected pin and function, whereby power dissipation is reduced in terms of unused pins and functions.
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