Cache memory analyzing method
    1.
    发明申请
    Cache memory analyzing method 有权
    缓存内存分析方法

    公开(公告)号:US20070055809A1

    公开(公告)日:2007-03-08

    申请号:US11515751

    申请日:2006-09-06

    IPC分类号: G06F12/08

    CPC分类号: G06F12/0864

    摘要: It is done to read information containing an address of a memory at which a cache miss is generated, from a cache memory. The numbers of cache misses generated at each cache miss generated address contained in the information are totalized. The cache miss generated addresses whose generated cache miss numbers are totalized are sectionalized by each of the sets. Further, the address group whose numbers of cache miss generated are consistent or close is extracted from a plurality of cache miss generated addresses divided as addresses in the same set.

    摘要翻译: 完成从高速缓冲存储器读取包含生成高速缓存未命中的存储器地址的信息。 在信息中包含的每个高速缓存未生成地址处生成的高速缓存未命中的数量被合计。 高速缓存未命中产生的地址,其生成的高速缓存未命中数字被累加,由每组组成。 此外,从分配为同一集合中的地址的多个高速缓存未命中生成的地址中提取出生成的高速缓存未命中数一致或关闭的地址组。

    Cache memory analyzing method
    2.
    发明授权
    Cache memory analyzing method 有权
    缓存内存分析方法

    公开(公告)号:US07590792B2

    公开(公告)日:2009-09-15

    申请号:US11515751

    申请日:2006-09-06

    CPC分类号: G06F12/0864

    摘要: It is done to read information containing an address of a memory at which a cache miss is generated, from a cache memory. The numbers of cache misses generated at each cache miss generated address contained in the information are totalized. The cache miss generated addresses whose generated cache miss numbers are totalized are sectionalized by each of the sets. Further, the address group whose numbers of cache miss generated are consistent or close is extracted from a plurality of cache miss generated addresses divided as addresses in the same set.

    摘要翻译: 完成从高速缓冲存储器读取包含生成高速缓存未命中的存储器地址的信息。 在信息中包含的每个高速缓存未生成地址处生成的高速缓存未命中的数量被合计。 高速缓存未命中产生的地址,其生成的高速缓存未命中数字被累加,由每组组成。 此外,从分配为同一集合中的地址的多个高速缓存未命中生成的地址中提取出生成的高速缓存未命中数一致或关闭的地址组。