公开(公告)号：US5544088A

公开(公告)日：1996-08-06

申请号：US492415

申请日：1995-06-19

申请人： Matthew E. Aubertine ,  Kianoush Beyzavi ,  Harold J. Broker ,  Ronald P. Checca ,  Michael A. Granato ,  David A. Haeussler ,  Michael Herasimtschuk ,  Michael J. Jurkovic ,  Gerard M. Salem ,  Craig R. Selinger ,  Paul R. Zehr

发明人： Matthew E. Aubertine ,  Kianoush Beyzavi ,  Harold J. Broker ,  Ronald P. Checca ,  Michael A. Granato ,  David A. Haeussler ,  Michael Herasimtschuk ,  Michael J. Jurkovic ,  Gerard M. Salem ,  Craig R. Selinger ,  Paul R. Zehr

IPC分类号： G06F13/40 ,  G06F17/50 ,  G06F15/17 ,  G06F11/26

CPC分类号： G06F13/4072 ,  G06F17/5072

摘要： A method is provided to assign component I/O (input/output, the interface area between levels of physical packaging) pins for all components at each level of the computer system. In a hierarchical, top-down design methodology, the I/O pins for each computer system component are assigned to nets (a net is an interconnection of pins on a level of packaging, or between levels of packaging) based on wire length, electrical limits and timing. Parameters that are considered are net priority (the importance of this net to the system, relative to other nets in the system), location of physical components, location of physical component I/Os at all computer system levels of physical packaging hierarchy, and I/O pin characteristics. An iterative method is used to assign and reassign I/O pins at each level based on timing. As I/Os are reassigned at each lower component level, new assignments are made at all higher levels of the system packaging hierarchy based on the changed parameters at the lower level. I/Os assignment by this method for a computer system package design reduces the occurance of any critical nets failing length, electrical or timing constraints due to poor I/O assignments. The method has built in checks to avoid being trapped in an NP complete situation (a form of endless loop).

摘要翻译： 提供了一种方法来为计算机系统的每个级别的所有组件分配组件I / O（输入/输出，物理封装级别之间的接口面积）引脚。 在分层的自上而下的设计方法中，每个计算机系统组件的I / O引脚分配给网络（网络是包装级别的引脚或封装层级之间的互连），基于导线长度，电气 限制和时间安排 被考虑的参数是网络优先级（该网络对系统的相对于系统中的其他网络的重要性），物理组件的位置，物理组件I / O在物理包装层次结构的所有计算机系统级别的位置，以及I / O引脚特性。 使用迭代方法根据时序分配和重新分配每个级别的I / O引脚。 由于I / O在每个较低的组件级别重新分配，所以根据较低级别的已更改参数在系统打包层次结构的所有较高级别进行新的分配。 通过该方法对计算机系统软件包设计进行的I / O分配可以减少由于I / O分配不良导致的任何关键网络发生长度，电气或时序限制的故障。 该方法已经内置了检查，以避免被困在NP完全情况（一种无止境循环的形式）中。