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公开(公告)号:US10476456B2
公开(公告)日:2019-11-12
申请号:US15465667
申请日:2017-03-22
Applicant: MediaTek Inc.
Inventor: Ayman Shabra , Michael A. Ashburn, Jr.
Abstract: A comparator is described. The comparator may be used in several applications, including in digital-to-analog converters (ADC). The comparator may comprise a high-speed amplifier, a low-noise amplifier, a controller and a bi-stable circuit. The high-speed amplifier may be activated during a first period, for example when the comparator tends to exhibit a slow response. During this period, the comparator may sacrifice the noise performance. The low-noise amplifier may be activated during a second period, for example when the difference between the signals appearing as inputs to the comparator is small. The low-noise amplifier may have a gain that is large enough to limit decision errors. The bi-stable circuit, which may be implemented using a latch, may be configured to output a signal equal to one of the supply voltages, in response to receiving the input signal from one of the stages.
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公开(公告)号:US20180097487A1
公开(公告)日:2018-04-05
申请号:US15465667
申请日:2017-03-22
Applicant: MediaTek Inc.
Inventor: Ayman Shabra , Michael A. Ashburn, JR.
IPC: H03F3/45
Abstract: A comparator is described. The comparator may be used in several applications, including in digital-to-analog converters (ADC). The comparator may comprise a high-speed amplifier, a low-noise amplifier, a controller and a bi-stable circuit. The high-speed amplifier may be activated during a first period, for example when the comparator tends to exhibit a slow response. During this period, the comparator may sacrifice the noise performance. The low-noise amplifier may be activated during a second period, for example when the difference between the signals appearing as inputs to the comparator is small. The low-noise amplifier may have a gain that is large enough to limit decision errors. The bi-stable circuit, which may be implemented using a latch, may be configured to output a signal equal to one of the supply voltages, in response to receiving the input signal from one of the stages.
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