AMPLIFIERS WITH ENHANCED POWER SUPPLY REJECTION RATIO AT THE OUTPUT STAGE
    1.
    发明申请
    AMPLIFIERS WITH ENHANCED POWER SUPPLY REJECTION RATIO AT THE OUTPUT STAGE 有权
    在输出阶段增强电源抑制比的放大器

    公开(公告)号:US20140015610A1

    公开(公告)日:2014-01-16

    申请号:US13922884

    申请日:2013-06-20

    Applicant: MediaTek Inc.

    CPC classification number: H03G3/004 H03F1/301 H03F3/3022 H03G3/007

    Abstract: An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage. The detection circuit detects disturbances occurring in a first supply voltage and provides detection results. The control amplifier circuit controls a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detection results. The output stage circuit includes a first output power transistor coupled to the control amplifier circuit at the first control node and a second output power transistor coupled to the control amplifier circuit at the second control node. The first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.

    Abstract translation: 公开了一种放大器电路。 放大器电路包括检测电路,控制放大器电路和输出级。 检测电路检测在第一电源电压中发生的干扰并提供检测结果。 响应于检测结果,控制放大器电路控制提供给第一控制节点的第一电压和提供给第二控制节点的第二电压。 输出级电路包括耦合到第一控制节点处的控制放大器电路的第一输出功率晶体管和耦合到第二控制节点处的控制放大器电路的第二输出功率晶体管。 当检测到发生干扰时,第一电压和第二电压被不同地控制。

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