公开(公告)号：US07292906B2

公开(公告)日：2007-11-06

申请号：US10890410

申请日：2004-07-14

Applicant: Merritt Funk ,  Kevin Augustine Pinto ,  Asao Yamashita ,  Wesley Natzle

Inventor： Merritt Funk ,  Kevin Augustine Pinto ,  Asao Yamashita ,  Wesley Natzle

IPC: G06F19/00 ,  H01L21/302

CPC classification number: H01L22/20 ,  H01L21/67248 ,  H01L21/67253 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A processing method of processing a substrate is presented that includes: receiving pre-process data, wherein the pre-process data comprises a desired process result and actual measured data for the substrate; determining a required process result, wherein the required process result comprises the difference between the desired process result and the actual measured data; creating a new process recipe by modifying a nominal recipe obtained from a processing tool using at least one of a static recipe and a formula model, wherein the new process recipe provides a new process result that is approximately equal to the required process result; and sending the new process recipe to the processing tool and the substrate.

Abstract translation: 提出了一种处理衬底的处理方法，包括：接收预处理数据，其中预处理数据包括所需的处理结果和衬底的实际测量数据; 确定所需的处理结果，其中所需的处理结果包括期望的处理结果与实际测量数据之间的差异; 通过使用静态配方和公式模型中的至少一个修改从处理工具获得的名义配方来创建新的过程配方，其中新的过程配方提供近似等于所需过程结果的新的过程结果; 并将新的工艺配方发送到处理工具和衬底。

公开(公告)号：US07567700B2

公开(公告)日：2009-07-28

申请号：US11390469

申请日：2006-03-28

Applicant: Merritt Funk ,  Radha Sundararajan ,  Daniel Joseph Prager ,  Wesley Natzle

Inventor： Merritt Funk ,  Radha Sundararajan ,  Daniel Joseph Prager ,  Wesley Natzle

IPC: G06K9/00

CPC classification number: G03F7/70625 ,  G03F7/70525

Abstract: A method of processing a wafer is presented that includes creating a pre-processing measurement map using measured metrology data for the wafer including metrology data for at least one isolated structure on the wafer, metrology data for at least one nested structure on the wafer, or mask data. At least one pre-processing prediction map is calculated for the wafer. A pre-processing confidence map is calculated for the wafer. The pre-processing confidence map includes a set of confidence data for the plurality of dies on the wafer. A prioritized measurement site is determined when the confidence data for one or more dies is not within the confidence limits. A new measurement recipe that includes the prioritized measurement site is then created.

Abstract translation: 提出了一种处理晶片的方法，其包括使用测量的用于晶片的测量数据创建预处理测量图，包括晶片上的至少一个隔离结构的测量数据，晶片上的至少一个嵌套结构的度量数据，或 掩码数据。 为晶片计算至少一个预处理预测图。 计算晶片的预处理置信图。 预处理置信图包括晶片上的多个管芯的一组置信数据。 当一个或多个管芯的置信度数据不在置信限度内时，确定优先测量点。 然后创建包含优先测量站点的新测量配方。

公开(公告)号：US20080027577A1

公开(公告)日：2008-01-31

申请号：US11865739

申请日：2007-10-02

Applicant: David Horak ,  Wesley Natzle ,  Merritt Funk ,  Kevin Lally ,  Daniel Prager

Inventor： David Horak ,  Wesley Natzle ,  Merritt Funk ,  Kevin Lally ,  Daniel Prager

IPC: G06F19/00 ,  G01B11/14

CPC classification number: H01L22/20

Abstract: A system, method and program product for correcting a deviation of a dimension of a feature from a target in a semiconductor process, are disclosed. The invention determines an origin of a deviation in a feature dimension from a target dimension regardless of whether it is based on processing or metrology. Adjustments for wafer processing variation of previous process tools can be fed forward, and adjustments for the process and/or integrated metrology tools may be fed back automatically during the processing of semiconductor wafers. The invention implements process reference wafers to determine the origin in one mode, and measurement reference wafers to determine the origin of deviations in another mode.

Abstract translation: 公开了一种用于在半导体处理中校正特征尺寸与目标的偏差的系统，方法和程序产品。 本发明确定特征维度与目标维度的偏差的起源，而不管其是基于处理还是计量学。 可以向前馈送先前工艺工具的晶片处理变化的调整，并且可以在半导体晶片的处理期间自动地反馈过程和/或集成度量工具的调整。 本发明实施过程参考晶片以确定一种模式中的原点，以及测量参考晶片以确定另一种模式中偏差的起点。

公开(公告)号：US20060042543A1

公开(公告)日：2006-03-02

申请号：US10927514

申请日：2004-08-27

Applicant: Merritt Funk ,  Wesley Natzle

Inventor： Merritt Funk ,  Wesley Natzle

IPC: B05C11/00

CPC classification number: H01L22/20 ,  G05B2219/45031

Abstract: The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semiconductor wafer.

Abstract translation: 本发明涉及控制半导体处理系统。 其中，本发明涉及一种运行到运行的控制器，用于创建虚拟模块以控制在半导体晶片的处理期间由多室工具执行的多遍处理。

公开(公告)号：US07502709B2

公开(公告)日：2009-03-10

申请号：US11390412

申请日：2006-03-28

Applicant: Merritt Funk ,  Radha Sundararajan ,  Daniel Joseph Prager ,  Wesley Natzle

Inventor： Merritt Funk ,  Radha Sundararajan ,  Daniel Joseph Prager ,  Wesley Natzle

IPC: G06F3/00

CPC classification number: H01L22/20 ,  H01L22/12

Abstract: A method of monitoring a dual damascene procedure that includes calculating a pre-processing confidence map for a damascene process, the pre-processing confidence map including confidence data for a first set of dies on the wafer. An expanded pre-processing measurement recipe is established for the damascene process when one or more values in the pre-processing confidence map are not within confidence limits established for the damascene process. A reduced pre-processing measurement recipe for the first damascene process is established when one or more values in the pre-processing confidence map are within confidence limits established for the damascene process.

Abstract translation: 一种监测双镶嵌程序的方法，包括计算镶嵌过程的预处理置信度图，所述预处理置信图包括晶片上的第一组模具的置信度数据。 当预处理置信图中的一个或多个值不在为大马士革过程建立的置信限度内时，为镶嵌过程建立扩展的预处理测量配方。 当预处理置信图中的一个或多个值在为大马士革过程建立的置信限度内时，建立了用于第一镶嵌工艺的减少的预处理测量配方。

公开(公告)号：US20070237383A1

公开(公告)日：2007-10-11

申请号：US11390469

申请日：2006-03-28

Applicant: Merritt Funk ,  Radha Sundararajan ,  Daniel Prager ,  Wesley Natzle

Inventor： Merritt Funk ,  Radha Sundararajan ,  Daniel Prager ,  Wesley Natzle

IPC: G06K9/00

CPC classification number: G03F7/70625 ,  G03F7/70525

Abstract: A method of processing a wafer is presented that includes creating a pre-processing measurement map using measured metrology data for the wafer including metrology data for at least one isolated structure on the wafer, metrology data for at least one nested structure on the wafer, or mask data. At least one pre-processing prediction map is calculated for the wafer. A pre-processing confidence map is calculated for the wafer. The pre-processing confidence map includes a set of confidence data for the plurality of dies on the wafer. A prioritized measurement site is determined when the confidence data for one or more dies is not within the confidence limits. A new measurement recipe that includes the prioritized measurement site is then created.

Abstract translation: 提出了一种处理晶片的方法，其包括使用测量的用于晶片的测量数据创建预处理测量图，包括晶片上的至少一个隔离结构的测量数据，晶片上的至少一个嵌套结构的度量数据，或 掩码数据。 为晶片计算至少一个预处理预测图。 计算晶片的预处理置信图。 预处理置信图包括晶片上的多个管芯的一组置信数据。 当一个或多个管芯的置信度数据不在置信限度内时，确定优先测量点。 然后创建包含优先测量站点的新测量配方。

公开(公告)号：US20070231930A1

公开(公告)日：2007-10-04

申请号：US11390412

申请日：2006-03-28

Applicant: Merritt Funk ,  Radha Sundararajan ,  Daniel Prager ,  Wesley Natzle

Inventor： Merritt Funk ,  Radha Sundararajan ,  Daniel Prager ,  Wesley Natzle

IPC: H01L21/66

CPC classification number: H01L22/20 ,  H01L22/12

Abstract: A method of monitoring a dual damascene procedure that includes calculating a pre-processing confidence map for a damascene process, the pre-processing confidence map including confidence data for a first set of dies on the wafer. An expanded pre-processing measurement recipe is established for the damascene process when one or more values in the pre-processing confidence map are not within confidence limits established for the damascene process. A reduced pre-processing measurement recipe for the first damascene process is established when one or more values in the pre-processing confidence map are within confidence limits established for the damascene process.

Abstract translation: 一种监测双镶嵌程序的方法，包括计算镶嵌过程的预处理置信度图，所述预处理置信图包括晶片上的第一组模具的置信度数据。 当预处理置信图中的一个或多个值不在为大马士革过程建立的置信限度内时，为镶嵌过程建立扩展的预处理测量配方。 当预处理置信图中的一个或多个值在为大马士革过程建立的置信限度内时，建立了用于第一镶嵌工艺的减少的预处理测量配方。

公开(公告)号：US20060047356A1

公开(公告)日：2006-03-02

申请号：US10927500

申请日：2004-08-27

Applicant: Merritt Funk ,  Wesley Natzle

Inventor： Merritt Funk ,  Wesley Natzle

IPC: G06F19/00

CPC classification number: G05B19/41865 ,  G05B2219/45031 ,  H01L22/20 ,  Y02P80/114 ,  Y02P90/20 ,  Y02P90/86

Abstract: The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semiconductor wafer.

Abstract translation: 本发明涉及控制半导体处理系统。 其中，本发明涉及一种运行到运行的控制器，用于创建虚拟模块以控制在半导体晶片的处理期间由多室工具执行的多遍处理。

公开(公告)号：US20060007453A1

公开(公告)日：2006-01-12

申请号：US10710447

申请日：2004-07-12

Applicant: David Horak ,  Wesley Natzle ,  Merritt Funk ,  Kevin Lally ,  Daniel Prager

Inventor： David Horak ,  Wesley Natzle ,  Merritt Funk ,  Kevin Lally ,  Daniel Prager

IPC: G06F19/00 ,  G01B11/14

CPC classification number: H01L22/20

Abstract: A system, method and program product for correcting a deviation of a dimension of a feature from a target in a semiconductor process, are disclosed. The invention determines an origin of a deviation in a feature dimension from a target dimension regardless of whether it is based on processing or metrology. Adjustments for wafer processing variation of previous process tools can be fed forward, and adjustments for the process and/or integrated metrology tools may be fed back automatically during the processing of semiconductor wafers. The invention implements process reference wafers to determine the origin in one mode, and measurement reference wafers to determine the origin of deviations in another mode.

Abstract translation: 公开了一种用于在半导体处理中校正特征尺寸与目标的偏差的系统，方法和程序产品。 本发明确定特征维度与目标维度的偏差的起源，而不管其是基于处理还是计量学。 可以向前馈送先前工艺工具的晶片处理变化的调整，并且可以在半导体晶片的处理期间自动地反馈过程和/或集成度量工具的调整。 本发明实施过程参考晶片以确定一种模式中的原点，以及测量参考晶片以确定另一种模式中偏差的起点。

公开(公告)号：US07451011B2

公开(公告)日：2008-11-11

申请号：US10927514

申请日：2004-08-27

Applicant: Merritt Funk ,  Wesley Natzle

Inventor： Merritt Funk ,  Wesley Natzle

IPC: G06F19/00

CPC classification number: H01L22/20 ,  G05B2219/45031

Abstract: The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semiconductor wafer.

Abstract translation: 本发明涉及控制半导体处理系统。 其中，本发明涉及一种运行到运行的控制器，用于创建虚拟模块以控制在半导体晶片的处理期间由多室工具执行的多遍处理。