公开(公告)号：US20250138822A1

公开(公告)日：2025-05-01

申请号：US18666540

申请日：2024-05-16

Applicant: Meta Platforms Technologies, LLC

Inventor： Reza Tusi ,  Shiyu Liu ,  Anthony Mai ,  Vlad Fruchter ,  Javid Jaffari

IPC: G06F9/30

Abstract: A computer-implemented method may include dividing, by a computer processor, binary code into a plurality of chunks, wherein the binary code includes a plurality of instructions. The method may additionally include clustering, by the computer processor, similar chunks of the plurality of chunks. The method may also include performing, by the computer processor, compression of the binary code, the compression being tailored to one or more clusters of the similar chunks. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US20240220574A1

公开(公告)日：2024-07-04

申请号：US18525466

申请日：2023-11-30

Applicant: Meta Platforms Technologies, LLC

Inventor： Shiyu Liu ,  Soroush Heidari ,  Tomonari Tohara ,  Reza Tusi ,  Javid Jaffari

IPC: G06F17/16

CPC classification number: G06F17/16

Abstract: A method implemented by a digital signal processor (DSP) including application-specific processing engines is provided. The method includes accessing, by the application-specific processing engines a configurable microcode. The configurable microcode includes a set of instructions configured to cause the application-specific processing engines to execute a matrix-based arithmetic algorithm. The method includes executing, by the application-specific processing engines, and based on the configurable microcode, the matrix-based arithmetic algorithm. Executing the matrix-based arithmetic algorithm includes receiving, by the application-specific processing engines, one or more input matrices, performing, by the application-specific processing engines, a plurality of computations based on the one or more input matrices by iteratively executing one or more of a predetermined set of arithmetic operations until the execution of the matrix-based arithmetic algorithm is completed, and generating, by the application-specific processing engines, an output corresponding to the completed execution of the matrix-based arithmetic algorithm.