公开(公告)号：US07067220B2

公开(公告)日：2006-06-27

申请号：US10065963

申请日：2002-12-04

申请人： Michael James Lercel ,  David Walker

发明人： Michael James Lercel ,  David Walker

IPC分类号： G03F9/00

CPC分类号： G03F1/20 ,  Y10S430/143

摘要： A method of producing a particle beam mask and mask structures to allow for the use of dummy fill shapes. This invention overcomes distortion in by adding a dummy shape in unexposed regions and applying a blocking layer to cover the dummy shape. The blocking layer is comprised of an aperture or additional mask mounted close to the mask or can be added to the mask itself.

摘要翻译： 一种产生粒子束掩模和掩模结构以允许使用虚拟填充形状的方法。 本发明通过在未曝光区域中添加虚拟形状并施加阻挡层以覆盖虚拟形状来克服失真。 阻挡层由安装在掩模附近的孔或附加掩模组成，或者可以添加到掩模本身。

公开(公告)号：US06610446B2

公开(公告)日：2003-08-26

申请号：US09770732

申请日：2001-01-26

申请人： Michael James Lercel

发明人： Michael James Lercel

IPC分类号： G03F900

CPC分类号： G03F7/70541 ,  G03F1/20

摘要： A mask includes an in-situ information storage mechanism on the mask, which stores mask pattern data that is supplied to a microlithographic tool (e.g., an optical stepper). The advantages of using the invention include immediate availability of pattern data of a particular mask to the microlithographic tool for improved integrated circuit productivity.

公开(公告)号：US06215190B1

公开(公告)日：2001-04-10

申请号：US09076525

申请日：1998-05-12

申请人： James Allen Bruce ,  Jonathan Daniel Chapple-Sokol ,  Charles W. Koburger, III ,  Michael James Lercel ,  Randy William Mann ,  James Spiros Nakos ,  John Joseph Prxarik ,  Kirk David Peterson ,  Jed Hickory Rankin

发明人： James Allen Bruce ,  Jonathan Daniel Chapple-Sokol ,  Charles W. Koburger, III ,  Michael James Lercel ,  Randy William Mann ,  James Spiros Nakos ,  John Joseph Prxarik ,  Kirk David Peterson ,  Jed Hickory Rankin

IPC分类号： H01L2348

CPC分类号： H01L21/76897 ,  H01L21/76801 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76888 ,  H01L27/11

摘要： A borderless contact to diffusion with respect to gate conductor is provided by employing a double insulating film stack as a mask for defining the gate conductor shapes for the entire chip and providing a relatively thin damage preventing layer on exposed conductive layer following defining the gate conductor shapes. In one embodiment, a borderless contact is provided by forming an insulating layer on a substrate, providing a conductive layer on the insulating layer, providing a second insulating layer on the conductive layer, providing a third insulating layer on the second insulating layer, removing preselected portions of the second and third insulating layers, providing a damage preventing layer in those areas where the second and third insulating layers have been removed, removing preselected portions of the third insulating layer, removing the damage preventing layer, removing exposed portions of the conductive layer, and removing now exposed portions of the second insulating layer.

摘要翻译： 通过采用双重绝缘薄膜叠层作为掩模，提供了一种无边界的相对于栅极导体的扩散接触，用于限定整个芯片的栅极导体形状，并在限定栅极导体形状之后在暴露的导电层上提供相对较薄的损伤防止层 。 在一个实施例中，通过在衬底上形成绝缘层来提供无边界接触，在绝缘层上提供导电层，在导电层上提供第二绝缘层，在第二绝缘层上提供第三绝缘层，去除预选 第二绝缘层和第三绝缘层的部分，在去除第二和第三绝缘层的那些区域中提供防损害层，去除第三绝缘层的预选部分，去除损坏防止层，去除导电层的暴露部分 并且去除第二绝缘层的现在暴露部分。

公开(公告)号：US06498096B2

公开(公告)日：2002-12-24

申请号：US09800911

申请日：2001-03-08

申请人： James Allan Bruce ,  Jonathan Daniel Chapple-Sokol ,  Charles W. Koburger, III ,  Michael James Lercel ,  Randy William Mann ,  James Spiros Nakos ,  John Joseph Pekarik ,  Kirk David Peterson ,  Jed Hickory Rankin

发明人： James Allan Bruce ,  Jonathan Daniel Chapple-Sokol ,  Charles W. Koburger, III ,  Michael James Lercel ,  Randy William Mann ,  James Spiros Nakos ,  John Joseph Pekarik ,  Kirk David Peterson ,  Jed Hickory Rankin

IPC分类号： H01L2144

CPC分类号： H01L21/76897 ,  H01L21/76801 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76888 ,  H01L27/11

摘要： A borderless contact to diffusion with respect to gate conductor is provided by employing a double insulating film stack as a mask for defining the gate conductor shapes for the entire chip and providing a relatively thin damage preventing layer on exposed conductive layer following defining the gate conductor shapes. In one embodiment, a borderless contact is provided by forming an insulating layer on a substrate, providing a conductive layer on the insulating layer, providing a second insulating layer on the conductive layer, providing a third insulating layer on the second insulating layer, removing preselected portions of the second and third insulating layers, providing a damage preventing layer in those areas where the second and third insulating layers have been removed, removing preselected portions of the third insulating layer, removing the damage preventing layer, removing exposed portions of the conductive layer, and removing now exposed portions of the second insulating layer.

摘要翻译： 通过采用双重绝缘薄膜叠层作为掩模，提供了一种无边界的相对于栅极导体的扩散接触，用于限定整个芯片的栅极导体形状，并在限定栅极导体形状之后在暴露的导电层上提供相对较薄的损伤防止层 。 在一个实施例中，通过在衬底上形成绝缘层来提供无边界接触，在绝缘层上提供导电层，在导电层上提供第二绝缘层，在第二绝缘层上提供第三绝缘层，去除预选 第二绝缘层和第三绝缘层的部分，在去除第二和第三绝缘层的那些区域中提供防损害层，去除第三绝缘层的预选部分，去除损坏防止层，去除导电层的暴露部分 并且去除第二绝缘层的现在暴露部分。