公开(公告)号：US20190096751A1

公开(公告)日：2019-03-28

申请号：US16103538

申请日：2018-08-14

Applicant: Microchip Technology Incorporated

Inventor： Justin Hiroki Sato ,  Bonnie Hamlin ,  Andrew Taylor ,  Bomy Chen ,  Brian Hennes

IPC: H01L21/768

Abstract: A method of forming interconnects in a semiconductor device is provided. A mask including first and second openings is formed over a non-conductive structure. An etch is performed through the mask openings to define (a) a via trench having a via trench width and (b) an interconnect trench having a smaller width than the via trench width. A fill layer is deposited over the structure and (a) fills only a partial width of the via trench to thereby define via trench cavity and (b) fills the full width of the interconnect trench. A further etch is performed through the via trench cavity to form a via opening extending downwardly from the via trench. The remaining fill layer material is removed. The interconnect trench, via trench, and via opening are metallized to form a trench interconnect, a via interconnect, and a via extending downwardly from the via interconnect.