公开(公告)号：US20250149463A1

公开(公告)日：2025-05-08

申请号：US18929394

申请日：2024-10-28

Applicant: Micron Technology, Inc.

Inventor： Po Chien Li ,  Yu Kai Kuo ,  Yi Wen Chen ,  Ming Wei Tsai ,  Chien Nan Fan ,  Chun Ming Huang ,  Angelo Oria Espina ,  Chun Jen Chang

IPC: H01L23/544 ,  H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H10B80/00

Abstract: Methods, systems, and devices for top die back-side marking for memory systems are described. One or more alignment marks may be added to the back-side of a top memory die in a multi-layer memory device and used to align a position of the top memory die relative to a position of a memory die below the top memory die. The alignment marks may be formed on the top memory die during the manufacturing process of the multi-layer memory device. Operations for forming the alignment marks are described using various semiconductor fabrication techniques. Operations are also disclosed for using the alignment marks to modify placement of the top memory die to reduce the alignment offset in the manufacturing process of subsequent memory dies.