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公开(公告)号:US20220181270A1
公开(公告)日:2022-06-09
申请号:US17111117
申请日:2020-12-03
Applicant: Micron Technology, Inc.
Inventor: Andrew Zhe Wei Ong , Liu Ziyan , Soo Ting Helen Yee , Qitao Fu
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers of respective memory cells and control gates, the tier located one over another over a substrate, the control gates including a control gate closest to the substrate, the control gates including respective portions forming a staircase structure; conductive contacts contacting the control gates at a location of the staircase structure, the conductive contacts including a conductive contact contacting the control gate; a dielectric structure located on sidewalls of the control gates; and support structures adjacent the conductive contacts and having lengths extending vertically from the substrate, the support structures including a support structure closest to the conductive contact, the support structure located at a distance from an edge of the dielectric structure, wherein a ratio of a width of the support structure over the distance is ranging from 1.6 to 2.0.
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公开(公告)号:US11705403B2
公开(公告)日:2023-07-18
申请号:US17111117
申请日:2020-12-03
Applicant: Micron Technology, Inc.
Inventor: Andrew Zhe Wei Ong , Liu Ziyan , Soo Ting Helen Yee , Qitao Fu
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L21/768 , H10B41/27 , H10B43/27
CPC classification number: H01L23/562 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H01L23/5283 , H10B41/27 , H10B43/27
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers of respective memory cells and control gates, the tier located one over another over a substrate, the control gates including a control gate closest to the substrate, the control gates including respective portions forming a staircase structure; conductive contacts contacting the control gates at a location of the staircase structure, the conductive contacts including a conductive contact contacting the control gate; a dielectric structure located on sidewalls of the control gates; and support structures adjacent the conductive contacts and having lengths extending vertically from the substrate, the support structures including a support structure closest to the conductive contact, the support structure located at a distance from an edge of the dielectric structure, wherein a ratio of a width of the support structure over the distance is ranging from 1.6 to 2.0.
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公开(公告)号:US20250132267A1
公开(公告)日:2025-04-24
申请号:US18999321
申请日:2024-12-23
Applicant: Micron Technology, Inc.
Inventor: Andrew Zhe Wei Ong , Liu Ziyan , Soo Ting Helen Yee , Qitao Fu
IPC: H01L23/00 , H01L21/768 , H01L23/522 , H01L23/528 , H10B41/27 , H10B43/27
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers of respective memory cells and control gates, the tier located one over another over a substrate, the control gates including a control gate closest to the substrate, the control gates including respective portions forming a staircase structure; conductive contacts contacting the control gates at a location of the staircase structure, the conductive contacts including a conductive contact contacting the control gate; a dielectric structure located on sidewalls of the control gates; and support structures adjacent the conductive contacts and having lengths extending vertically from the substrate, the support structures including a support structure closest to the conductive contact, the support structure located at a distance from an edge of the dielectric structure, wherein a ratio of a width of the support structure over the distance is ranging from 1.6 to 2.0.
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公开(公告)号:US12176300B2
公开(公告)日:2024-12-24
申请号:US18209231
申请日:2023-06-13
Applicant: Micron Technology, Inc.
Inventor: Andrew Zhe Wei Ong , Liu Ziyan , Soo Ting Helen Yee , Qitao Fu
IPC: H01L23/00 , H01L21/768 , H01L23/522 , H01L23/528 , H10B41/27 , H10B43/27
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers of respective memory cells and control gates, the tier located one over another over a substrate, the control gates including a control gate closest to the substrate, the control gates including respective portions forming a staircase structure; conductive contacts contacting the control gates at a location of the staircase structure, the conductive contacts including a conductive contact contacting the control gate; a dielectric structure located on sidewalls of the control gates; and support structures adjacent the conductive contacts and having lengths extending vertically from the substrate, the support structures including a support structure closest to the conductive contact, the support structure located at a distance from an edge of the dielectric structure, wherein a ratio of a width of the support structure over the distance is ranging from 1.6 to 2.0.
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公开(公告)号:US20230326877A1
公开(公告)日:2023-10-12
申请号:US18209231
申请日:2023-06-13
Applicant: Micron Technology, Inc.
Inventor: Andrew Zhe Wei Ong , Liu Ziyan , Soo Ting Helen Yee , Qitao Fu
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L21/768 , H10B41/27 , H10B43/27
CPC classification number: H01L23/562 , H01L23/5226 , H01L23/5283 , H01L21/76877 , H01L21/76816 , H10B41/27 , H10B43/27
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers of respective memory cells and control gates, the tier located one over another over a substrate, the control gates including a control gate closest to the substrate, the control gates including respective portions forming a staircase structure; conductive contacts contacting the control gates at a location of the staircase structure, the conductive contacts including a conductive contact contacting the control gate; a dielectric structure located on sidewalls of the control gates; and support structures adjacent the conductive contacts and having lengths extending vertically from the substrate, the support structures including a support structure closest to the conductive contact, the support structure located at a distance from an edge of the dielectric structure, wherein a ratio of a width of the support structure over the distance is ranging from 1.6 to 2.0.
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