Method for efficient manufacturing of integrated circuits
    1.
    发明申请
    Method for efficient manufacturing of integrated circuits 失效
    集成电路高效制造方法

    公开(公告)号:US20020083401A1

    公开(公告)日:2002-06-27

    申请号:US09932064

    申请日:2001-08-17

    CPC classification number: G03F7/70625 H01L22/20

    Abstract: This invention pertains to a method for the systematic development of integrated chip technology. The method may include obtaining empirical data of parameters for an existing integrated circuit manufacturing process and extrapolating the known data to a new technology to assess potential yields of the new technology from the known process. Further, process variables of the new process may be adjusted based upon the empirical data in order to optimize the yields of the new technology. A logic based computing system such as a fuzzy logic or neural-network system may be utilized. The computing system may also be utilized to improve the yields of an existing manufacturing process by adjust process variables within downstream process tools based upon data collected in upstream process for a particular semiconductor substrate or lot.

    Abstract translation: 本发明涉及集成芯片技术的系统开发的方法。 该方法可以包括获得用于现有集成电路制造过程的参数的经验数据,并将已知数据外插到新技术,以从已知过程评估新技术的潜在产量。 此外,可以基于经验数据来调整新过程的过程变量,以便优化新技术的收益率。 可以使用诸如模糊逻辑或神经网络系统的基于逻辑的计算系统。 还可以使用计算系统来通过基于在特定半导体衬底或批次的上游工艺中收集的数据来调整下游工艺工具内的工艺变量来提高现有制造工艺的产量。

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