公开(公告)号：US20240394164A1

公开(公告)日：2024-11-28

申请号：US18696218

申请日：2022-07-25

Applicant: Micron Technology, Inc.

Inventor： Ziqing WU ,  Wenjun WU ,  Xiaolai ZHU ,  Chunyu SHENG ,  Xiao WANG

IPC: G06F11/30 ,  G06F11/34

Abstract: Methods, systems, and devices for memory performance evaluation using address mapping information are described. A memory system may write a data file associated with a range of logical block addresses to a first set of blocks in a set of memory dies. The memory system may then determine, for a memory die of the set of memory dies that stores a portion of the data file, a quantity of read operations for reading the portion of the data file. The memory system may determine the quantity of read operations based on address mapping information that maps logical block addresses associated with the datafile to physical addresses. After determining the quantity of read operations, the memory device may use the quantity of read operations to determine a performance metric associated with the data file and the first set of blocks.