公开(公告)号：US09310832B2

公开(公告)日：2016-04-12

申请号：US13664139

申请日：2012-10-30

Applicant: NATIONAL INSTRUMENTS CORPORATION

Inventor： Jason W. Frels ,  Rodney D. Greenstreet ,  Gabriel L. Narus ,  Mark R. Wetzel

IPC: G06F1/12

CPC classification number: G06F1/12

Abstract: Techniques and systems for synchronizing a clock via a backplane. An apparatus includes a backplane, a clock coupled to or included in the backplane, a synchronization interface, and at least one processing element coupled to the clock via the backplane and coupled to or including the synchronization interface. The at least one processing element may be configured to compare first time information received from the clock via the backplane with second time information received from the synchronization interface. The second time information may be associated with an external clock. The at least one processing element may determine adjustment information based on the comparison and synchronize the clock with an external clock using the adjustment information, via the backplane. The apparatus may be a PXIe chassis. The clock output may be sent to modules plugged into the backplane in order to synchronize them with an external chassis clock, for example.

Abstract translation: 通过背板同步时钟的技术和系统。 一种装置包括背板，耦合到或包括在背板中的时钟，同步接口以及经由背板耦合到时钟并且耦合到或包括同步接口的至少一个处理元件。 至少一个处理元件可以被配置为将从时钟经由背板接收的第一时间信息与从同步接口接收的第二时间信息进行比较。 第二时间信息可以与外部时钟相关联。 所述至少一个处理元件可以基于比较来确定调整信息，并且经由背板使用调整信息将时钟与外部时钟同步。 该设备可能是PXIe机箱。 例如，时钟输出可以发送到插入背板的模块，以便与外部机箱时钟同步。

公开(公告)号：US20140122915A1

公开(公告)日：2014-05-01

申请号：US13664139

申请日：2012-10-30

Applicant: NATIONAL INSTRUMENTS CORPORATION

Inventor： Jason W. Frels ,  Rodney D. Greenstreet ,  Gabriel L. Narus ,  Mark R. Wetzel

IPC: G06F1/12

CPC classification number: G06F1/12

Abstract: Techniques and systems for synchronizing a clock via a backplane. An apparatus includes a backplane, a clock coupled to or included in the backplane, a synchronization interface, and at least one processing element coupled to the clock via the backplane and coupled to or including the synchronization interface. The at least one processing element may be configured to compare first time information received from the clock via the backplane with second time information received from the synchronization interface. The second time information may be associated with an external clock. The at least one processing element may determine adjustment information based on the comparison and synchronize the clock with an external clock using the adjustment information, via the backplane. The apparatus may be a PXIe chassis. The clock output may be sent to modules plugged into the backplane in order to synchronize them with an external chassis clock, for example.

Abstract translation: 通过背板同步时钟的技术和系统。 一种装置包括背板，耦合到或包括在背板中的时钟，同步接口以及经由背板耦合到时钟并且耦合到或包括同步接口的至少一个处理元件。 至少一个处理元件可以被配置为将从时钟经由背板接收的第一时间信息与从同步接口接收的第二时间信息进行比较。 第二次信息可以与外部时钟相关联。 所述至少一个处理元件可以基于比较来确定调整信息，并且经由背板使用调整信息将时钟与外部时钟同步。 该设备可能是PXIe机箱。 例如，时钟输出可以发送到插入背板的模块，以便与外部机箱时钟同步。