Semiconductor memory device and control method and manufacturing method thereof
    1.
    发明申请
    Semiconductor memory device and control method and manufacturing method thereof 失效
    半导体存储器件及其控制方法及其制造方法

    公开(公告)号:US20040071011A1

    公开(公告)日:2004-04-15

    申请号:US10648295

    申请日:2003-08-27

    IPC分类号: G11C011/00

    摘要: A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film are included, wherein the first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines disposed on a layer overlying the semiconductor substrate. The second diffusion region is connected to a program and erase bit line disposed on a layer overlying the semiconductor substrate. Programming is performed to a selected memory cell transistor by hot electron injection, while erasing from the selected memory cell is performed by the hot hole injection.

    摘要翻译: 半导体存储器件包括设置在第一和第二扩散区域之间的半导体衬底上的第一绝缘膜,设置在第一绝缘膜上的第一栅电极,设置在第二扩散区和第三扩散区之间的半导体衬底上的第二绝缘膜 并且包括设置在第二绝缘膜上的第二栅电极,其中第一和第二扩散区,第一绝缘膜和第一栅电极构成第一存储单元,而第二和第三扩散区,第二绝缘膜, 和第二栅电极构成第二存储单元。 第一和第二栅电极共同连接形成字线电极。 第一和第三扩散区域连接到布置在覆盖半​​导体衬底的层上的第一和第二读位线。 第二扩散区域连接到布置在覆盖半​​导体衬底的层上的编程和擦除位线。 通过热电子注入对所选择的存储单元晶体管进行编程,而通过热空穴注入执行从所选存储单元的擦除。