公开(公告)号：US20150214937A1

公开(公告)日：2015-07-30

申请号：US14164252

申请日：2014-01-26

申请人： NIDHI CHAUDHRY ,  Parul K. Sharma

发明人： NIDHI CHAUDHRY ,  Parul K. Sharma

IPC分类号： H03K5/08

CPC分类号： H03K5/08

摘要： A voltage clamping circuit that is implemented using low voltage devices provides a way to discharge an input/output pin to ground during overvoltage conditions and to avoid any interaction between the input/output pin and the input/output supply during clamping action. The voltage clamping circuit is also self-protected. A voltage detection circuit detects an overvoltage condition and in response generates a signal that turns on a PMOS, which in turn provides a clamping current path between the input/output pin and ground.

摘要翻译： 使用低电压器件实现的钳位电路提供了一种在过电压条件下将输入/输出引脚放电到地的方法，并避免了在钳位动作期间输入/输出引脚与输入/输出电源之间的任何相互作用。 电压钳位电路也是自保护的。 电压检测电路检测过电压状态，并且响应于产生导通PMOS的信号，其又在输入/输出引脚与地之间提供钳位电流路径。