FAULT CURRENT-SUPPRESSING DAMPER TOPOLOGY CIRCUIT AND CONTROL METHOD THEREOF AND CONVERTER

    公开(公告)号:US20180183231A1

    公开(公告)日:2018-06-28

    申请号:US15570750

    申请日:2016-07-13

    IPC分类号: H02H7/12 H03K17/081

    摘要: Disclosed are a fault current-suppressing damper topology circuit and a control method thereof and a converter. An anode of a separate diode is connected to a positive electrode of a second switch module, a cathode of the separate diode is connected to one end of an energy storage capacitor, and the other end of the energy storage capacitor is connected to a negative electrode of a first switch module; a damping resistor is connected in parallel with an arrester and then with the first switch module; a bypass switch is connected in parallel between a terminal x1 and a terminal x2 of the damper topology circuit; a power supply system acquires energy from the energy storage capacitor and supplies power to a control system; and the control system controls an operating state of the damper topology circuit by controlling the bypass switch, the first switch module and the second switch module. The fault current-suppressing damper topology circuit is applied to voltage source converters. In case of a DC fault, stress resulting from fault currents is reduced by use of a damping resistor, thereby avoiding damages to a device and achieving self-power supply, modularization and independent control. The fault current-suppressing damper topology circuit can be flexibly applied to various types of voltage source converters and has outstanding economic efficiency and technicality.

    MULTI-VOLTAGE LEVEL DIRECT CURRENT GRID SYSTEM AND CONTROL PROTECTION METHOD

    公开(公告)号:US20210265835A1

    公开(公告)日:2021-08-26

    申请号:US17251274

    申请日:2019-04-01

    IPC分类号: H02H9/02 H02H1/00

    摘要: A multi-voltage level direct current grid system and a control protection method, the direct current grid system comprising: at least two direct current buses; at least one direct current transformer, one end of which is connected to a first direct current bus while another end is connected to a second direct current bus or a lead-out wire, which may achieve direct current voltage conversion; and at least one lead-out wire current limiter, one end of the lead-out wire current limiter being connected to the second direct current bus while another end is connected to the lead-out wire; the lead-out wire current limiter comprises a first current-limiting unit, and the first current limiting unit comprises a group of direct current switches, as well as a first bypass switch and a first current-limiting resistor unit that are connected in parallel.