-
公开(公告)号:US11611395B2
公开(公告)日:2023-03-21
申请号:US17273544
申请日:2019-10-07
发明人: Tomohiro Takamuku , Mitsuteru Yoshida , Tsutomu Takeya , Kazuhito Takei , Katsuichi Oyama , Tomoharu Semboku
IPC分类号: H04B10/2507 , H04B10/2569 , H04B10/61
摘要: First compensation circuitry includes a first digital filter compensating a phase difference between a phase of a symbol of a received signal and a sampling timing, and first filter coefficient calculation circuitry calculating a filter coefficient of the first digital filter as a first filter coefficient. Second filter coefficient calculation circuitry calculates, as a second filter coefficient, a filter coefficient for adaptive equalization that compensates distortion due to temporally changing polarization dispersion, based on an output of the first digital filter. Coefficient combination circuitry combines the first filter coefficient and the second filter coefficient. Second compensation circuitry includes a second digital filter which uses a filter coefficient combined by the coefficient combination circuitry and performs a compensation of the phase difference between the phase of the symbol of the received signal and the sampling timing, and a process of the adaptive equalization at the same time.
-
2.
公开(公告)号:US11201721B2
公开(公告)日:2021-12-14
申请号:US17174787
申请日:2021-02-12
发明人: Mitsuteru Yoshida , Yasuyuki Endoh , Katsuichi Oyama , Masayuki Ikeda , Tsutomu Takeya , Etsushi Yamazaki , Yoshiaki Kisaka , Masahito Tomizawa
IPC分类号: H04B10/00 , H04L7/00 , H04B10/61 , H04B10/556
摘要: A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination. According to this invention, it is possible to provide a frame synchronization apparatus that correctly determines a synchronization state even if an error rate of received symbols is high.
-
3.
公开(公告)号:US11121778B1
公开(公告)日:2021-09-14
申请号:US17255156
申请日:2019-07-22
发明人: Tomohiro Takamuku , Mitsuteru Yoshida , Tsutomu Takeya , Katsuichi Oyama , Hiroyuki Nouchi , Atsushi Suenaga
摘要: A known pattern comparison type phase difference detection unit (12) detects a phase difference between a known pattern extracted from a received signal and a true value of the known pattern as a first phase difference. M indicates the number of modulation phases in a phase modulation method of the received signal. An M-th power type phase difference detection unit (13) removes a modulation component by raising the received signal to M-th power, and detects phase variation from a modulation phase point used for mapping on a transmission side, as a second phase difference. A phase compensation unit (11) compensates phase variation of the received signal based on an addition result of the first phase difference and the second phase difference.
-
公开(公告)号:US12040834B2
公开(公告)日:2024-07-16
申请号:US17596617
申请日:2020-06-10
IPC分类号: H04B10/2569 , H04B3/06 , H04B10/61
CPC分类号: H04B10/2569 , H04B3/06 , H04B10/61
摘要: An adaptive equalizer (70) according to this invention includes an adaptive equalization filter (71) configured to adaptively compensate for a waveform distortion caused by a polarization fluctuation of a received signal (61) by updating a tap coefficient, a first tap coefficient updater (72) configured to calculate the tap coefficient according to the polarization fluctuation of the received signal (61) using a variable step size and update the tap coefficient of the adaptive equalization filter (71), a second tap coefficient updater (73) configured to calculate the tap coefficient according to the polarization fluctuation of the received signal (61) using a fixed step size μ0, a polarization state estimator (74) configured to estimate a polarization state of the received signal (61) using the tap coefficient calculated by the second tap coefficient updater (73), and a step size updater (75) configured to obtain the step size corresponding to the polarization state estimated by the polarization state estimator (74) and update the variable step size. According to this invention, it is possible to provide an adaptive equalizer that always implements stable followability to various SOP fluctuations.
-
5.
公开(公告)号:US11323238B2
公开(公告)日:2022-05-03
申请号:US16972531
申请日:2019-06-06
发明人: Mitsuteru Yoshida , Yasuyuki Endoh , Katsuichi Oyama , Masayuki Ikeda , Tsutomu Takeya , Etsushi Yamazaki , Yoshiaki Kisaka , Masahito Tomizawa
IPC分类号: H04L7/00 , H04L7/04 , H04L27/227 , H04B10/556 , H04B10/61
摘要: A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination. According to this invention, it is possible to provide a frame synchronization apparatus that correctly determines a synchronization state even if an error rate of received symbols is high.
-
-
-
-