公开(公告)号：US11791938B2

公开(公告)日：2023-10-17

申请号：US16584811

申请日：2019-09-26

Applicant: NVIDIA Corporation

Inventor： Victor Podlozhnyuk ,  Nirmal Saxena ,  Yanxiang Huang

IPC: H04L1/00 ,  H04W28/04

CPC classification number: H04L1/0076 ,  H04L1/0057 ,  H04W28/04

Abstract: Apparatuses, systems, and techniques to decode encoded data. In at least one embodiment, parts of information for decoding the encoded data is provided to a plurality of processors, and parts of data decoded by the plurality of processors is combined.

公开(公告)号：US20240430037A1

公开(公告)日：2024-12-26

申请号：US18380571

申请日：2023-10-16

Applicant: NVIDIA Corporation

Inventor： Victor Podlozhnyuk ,  Nirmal Saxena ,  Yanxiang Huang

IPC: H04L1/00 ,  H04W28/04

Abstract: Apparatuses, systems, and techniques to decode encoded data. In at least one embodiment, parts of information for decoding the encoded data is provided to a plurality of processors, and parts of data decoded by the plurality of processors is combined.

公开(公告)号：US20210152282A1

公开(公告)日：2021-05-20

申请号：US16685641

申请日：2019-11-15

Applicant: NVIDIA Corporation

Inventor： Yanxiang Huang ,  James Delfeld

IPC: H04L1/00 ,  H03M13/00 ,  H03M13/11 ,  H04L1/06 ,  H04B7/08

Abstract: Apparatuses, systems, and techniques to correct errors in information received from a plurality of fifth-generation new radio antennas. In at least one embodiment, codeword information is decoded by a plurality of variable (or vector) nodes and check nodes, where codewords and nodes are divided among processors to be performed in parallel.

公开(公告)号：US20240402250A1

公开(公告)日：2024-12-05

申请号：US18203258

申请日：2023-05-30

Applicant: NVIDIA Corporation

Inventor： Saurabh Hukerikar ,  Nirmal Saxena ,  Atieh Lotfi ,  Samuel H. Duncan ,  Yanxiang Huang ,  Jason Campbell ,  Paul Racunas

IPC: G01R31/3187 ,  G01R31/319

Abstract: In various examples, faults are detected based at least in part on result value(s) generated by hardware component(s) by performing one or more diagnostic tests in accordance with a diagnostic test pattern. The diagnostic test pattern may be used to perform an assessment of functionality of the hardware component(s) by causing the hardware component(s) to generate the result value(s), which may be used to identify one or more hardware faults (e.g., by comparing the result value(s) to expected value(s)).

公开(公告)号：US20210099251A1

公开(公告)日：2021-04-01

申请号：US16584811

申请日：2019-09-26

Applicant: NVIDIA Corporation

Inventor： Victor Podlozhnyuk ,  Nirmal Saxena ,  Yanxiang Huang

IPC: H04L1/00 ,  H04W28/04

Abstract: Apparatuses, systems, and techniques to decode encoded data. In at least one embodiment, parts of information for decoding the encoded data is provided to a plurality of processors, and parts of data decoded by the plurality of processors is combined.