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公开(公告)号:US11176906B2
公开(公告)日:2021-11-16
申请号:US16118246
申请日:2018-08-30
Applicant: NXP B.V.
IPC: G09G5/00
Abstract: A system includes a video generation circuit (102) to generate first graphics information, a display circuit (112) to display the graphics information, and a low voltage differential signaling (LVDS) (120) video interface to couple graphics information from the video generation circuit to the display circuit. The display circuit can determine that a first channel (204) of the LVDS video interface is corrupted. In response, the display circuit provides a remediation signal (205) to direct the video generation circuit (102) to operate in an alternative operating mode (208).