公开(公告)号：US20190278677A1

公开(公告)日：2019-09-12

申请号：US15914400

申请日：2018-03-07

Applicant: NXP B.V.

Inventor： Andrei S. Terechko ,  Gerardo H. O. Daalderop ,  Johannes van Doorn ,  Han Raaijmakers

IPC: G06F11/22 ,  G06F11/36

Abstract: A method, apparatus, article of manufacture, and system are provided for detecting hardware faults on a multi-core integrated circuit device by executing runtime software-based self-test code concurrently on multiple processor cores to generate a first set of self-test results from a first processor core and a second set of self-test results from a second processor core; performing mutual inter-core checking of the self-test results by using the first processor core to check the second set of self-test results from the second processor core while simultaneously using the second processor core to check the first set of self-test results from the first processor core; and then using the second processor core to immediately execute a recovery mechanism for the first processor core if comparison of the first set of self-test results against reference test results indicates there is a hardware failure at the first processor core.