公开(公告)号：US11671062B2

公开(公告)日：2023-06-06

申请号：US17392508

申请日：2021-08-03

Applicant: NXP B.V.

Inventor： Marco Berkhout ,  Quino Sandifort ,  Gayatri Agarwal

IPC: H03F3/217 ,  H03F3/185

CPC classification number: H03F3/2171 ,  H03F3/185 ,  H03F2200/03

Abstract: A sense amplifier circuit comprising a first-, second-, third- and fourth-amplification-blocks, each amplification-block comprising: an amplification-block-transistor comprising and an amplification-block-resistor. The amplification-block-transistor includes: a first-conduction-channel-terminal, a second-conduction-channel-terminal that is connected to an amplification-block-output-node, and a control-terminal that is connected to an amplification-block-control-node. The sense amplifier circuit also comprises: an amplification-block-resistor connected in series between an amplification-block-input-node and the first-conduction-channel-terminal; a first-bias-voltage-source connected to the amplification-block-control-nodes of the first- and third-amplification-blocks, a second-bias-voltage-source connected to the amplification-block-control-nodes of the second- and fourth-amplification-blocks. The sense amplifier circuit also comprises: a first-common-mode-voltage-resistor connected in series between a first-sensed-output-terminal and a common-mode-voltage-node; and a second-common-mode-voltage-resistor connected in series between a second-sensed-output-terminal and the common-mode-voltage-node.

公开(公告)号：US20220069782A1

公开(公告)日：2022-03-03

申请号：US17392508

申请日：2021-08-03

Applicant: NXP B.V.

Inventor： Marco Berkhout ,  Quino Sandifort ,  Gayatri Agarwal

IPC: H03F3/217 ,  H03F3/185

Abstract: A sense amplifier circuit comprising a first-, second-, third- and fourth-amplification-blocks, each amplification-block comprising: an amplification-block-transistor comprising and an amplification-block-resistor. The amplification-block-transistor includes: a first-conduction-channel-terminal, a second-conduction-channel-terminal that is connected to an amplification-block-output-node, and a control-terminal that is connected to an amplification-block-control-node. The sense amplifier circuit also comprises: an amplification-block-resistor connected in series between an amplification-block-input-node and the first-conduction-channel-terminal; a first-bias-voltage-source connected to the amplification-block-control-nodes of the first- and third-amplification-blocks, a second-bias-voltage-source connected to the amplification-block-control-nodes of the second- and fourth-amplification-blocks. The sense amplifier circuit also comprises: a first-common-mode-voltage-resistor connected in series between a first-sensed-output-terminal and a common-mode-voltage-node; and a second-common-mode-voltage-resistor connected in series between a second- sensed-output-terminal and the common-mode-voltage-node.

公开(公告)号：US10891933B2

公开(公告)日：2021-01-12

申请号：US16561106

申请日：2019-09-05

Applicant: NXP B.V.

Inventor： Fre Jorrit Jorritsma ,  Quino Sandifort ,  Albertus de Man ,  Mattheus Johan Koerts

IPC: G10K11/178 ,  H03F3/181 ,  H03F3/217 ,  H04R9/06 ,  H04R29/00

Abstract: An audio processing system is described including an amplifier configured to receive a first audio signal and output the first audio signal to an acoustic transducer comprising a voice coil. A sensor detects a signal corresponding to voice coil current of the acoustic transducer. A controller compares the first audio signal and the detected signal and determines a second audio signal from the comparison. The second audio signal is representative of an external sound source detected via the acoustic transducer. The audio processing system may simultaneously output the first audio signal and receive the second audio signal using the same acoustic transducer.