-
公开(公告)号：US11372095B2
公开(公告)日：2022-06-28
申请号：US16521120
申请日：2019-07-24
Applicant: NXP B.V.
Abstract: Aspects of the present disclosure are directed to injection locking and related apparatuses. As may be implemented in accordance with one or more embodiments, an apparatus includes a plurality of injection-locking circuits configured to receive an injection signal, each injection-locking circuit including a mixer and a lock-detection circuit. In each of the injection-locking circuits, the lock-detection circuit detects a lock-status relationship between the injection signal and a signal output from the injection-locking circuit. In response to the lock-status relationship indicating an unlocked condition, a phase/magnitude of the injection signal is adjusted. In response to the lock-status relationship indicating a locked condition, transmission of an FM continuous wave (FMCW) chirp signal is facilitated.
-
公开(公告)号：US20210026002A1
公开(公告)日：2021-01-28
申请号：US16521120
申请日：2019-07-24
Applicant: NXP B.V.
Abstract: Aspects of the present disclosure are directed to injection locking and related apparatuses. As may be implemented in accordance with one or more embodiments, an apparatus includes a plurality of injection-locking circuits configured to receive an injection signal, each injection-locking circuit including a mixer and a lock-detection circuit. In each of the injection-locking circuits, the lock-detection circuit detects a lock-status relationship between the injection signal and a signal output from the injection-locking circuit. In response to the lock-status relationship indicating an unlocked condition, a phase/magnitude of the injection signal is adjusted. In response to the lock-status relationship indicating a locked condition, transmission of an FM continuous wave (FMCW) chirp signal is facilitated.
-
公开(公告)号：US11228318B1
公开(公告)日：2022-01-18
申请号：US17083968
申请日：2020-10-29
Applicant: NXP B.V.
Inventor： Tarik Saric , Piotr Gibas , Zhirui Zong
Abstract: Exemplary aspects of the present disclosure involve a system and related method of PLL circuitry in a chirp signaling FMCW system having a variable PLL bandwidth (BW). To adjust the BW, the PLL circuitry may provide for variable capacitance in the circuitry. This capacitance change may allow for a bandwidth for one slope, as used for the acquisition period. The capacitance may then be adjusted to allow for a different bandwidth for another slope which is used to reset the circuitry in preparation for another frequency sweep. Adjusting the PLL BW, via variable capacitance, may be used to mitigate phase noise which can adversely the PLL.
-
-
Search Results
3
records
(took 0.01 seconds)
