Cascading content addressable memory devices with programmable input/output connections
    1.
    发明授权
    Cascading content addressable memory devices with programmable input/output connections 有权
    具有可编程输入/输出连接的级联内容可寻址存储器件

    公开(公告)号:US07043600B2

    公开(公告)日:2006-05-09

    申请号:US10249842

    申请日:2003-05-12

    IPC分类号: G06F12/00

    CPC分类号: G11C15/00

    摘要: CAM devices that can be cascaded together to form CAM systems of different sizes are disclosed. The system has one or more clusters of M CAM devices, each device including (M−1) disable connections. Disable signals are used to avoid contention so that one CAM device generates the system output on a shared bus. To reduce pin count, the CAM device of priority N within each cluster has (N−1) of its disable connections programmed as inputs for disable-in signals received from higher-priority CAM devices, and its remaining (M−N) disable connections programmed as outputs for disable-out signals provided to lower-priority CAM devices. Some embodiments include two or more clusters of CAM devices and a controller. In some embodiments, the CAM system works as fast as a single CAM device. Some embodiments impose no architectural limits on the number of CAM devices that can be cascaded together.

    摘要翻译: 公开了可以级联在一起以形成不同尺寸的CAM系统的CAM装置。 该系统具有一个或多个M CAM设备群集,每个设备包括(M-1)禁用连接。 禁用信号用于避免竞争,以便一个CAM设备在共享总线上生成系统输出。 为了减少引脚数量,每个簇内优先级为N的CAM器件将其禁用连接的(N-1)编程为从较高优先级CAM器件接收的禁止输入信号的输入,其剩余(MN)禁止连接编程为 输出用于禁止输出信号提供给较低优先级的CAM设备。 一些实施例包括两个或更多个CAM设备群集和控制器。 在一些实施例中,CAM系统与单个CAM设备一样快。 一些实施例对可以级联在一起的CAM设备的数量没有施加架构限制。

    Binary-ternary content addressable memory
    2.
    发明授权
    Binary-ternary content addressable memory 有权
    二进制三元内容可寻址内存

    公开(公告)号:US06362992B1

    公开(公告)日:2002-03-26

    申请号:US09684589

    申请日:2000-10-06

    申请人: Paul C. Cheng

    发明人: Paul C. Cheng

    IPC分类号: G11C1500

    CPC分类号: G11C15/00 G11C15/04

    摘要: A binary-ternary configurable content addressable memory (CAM) (100). A plurality of CAM cells (114) including comparator logic cells (116) and paired storage locations (118, 118a, 118b) are directed by a signal at a mode terminal (120) to compare data provided at an input bus (110), either in binary mode against pre-stored content data or in ternary mode against pre-stored content and mask data. The comparator logic cells (116) generate respective bit signals (122) based on such comparison, and in this manner the plurality of CAM cells (114) may collectively be part of a CAM array block (104), which may optionally in turn work with a match detection block (106) to generate a match signal (126), and which may optionally in turn work with a priority encoder block (108) to generate a result signal at a result output (112).

    摘要翻译: 二进制三元可配置内容可寻址存储器(CAM)(100)。 包括比较器逻辑单元(116)和成对存储位置(118,118a,118b)的多个CAM单元(114)由模式终端(120)处的信号引导以比较在输入总线(110)处提供的数据, 以预先存储的内容数据的二进制模式,或者针对预存的内容和掩码数据的三进制模式。 比较器逻辑单元(116)基于这样的比较产生相应的位信号(122),并且以这种方式,多个CAM单元(114)可以共同地是CAM阵列块(104)的一部分,其可以可选地依次工作 具有匹配检测块(106)以产生匹配信号(126),并且其可以可选地依次与优先级编码器块(108)一起工作,以在结果输出(112)产生结果信号。

    Simultaneously searching for a plurality of patterns definable by complex expressions, and efficiently generating data for such searching
    3.
    发明授权
    Simultaneously searching for a plurality of patterns definable by complex expressions, and efficiently generating data for such searching 有权
    同时搜索由复杂表达式定义的多个模式,并且有效地生成用于这种搜索的数据

    公开(公告)号:US07260558B1

    公开(公告)日:2007-08-21

    申请号:US11257485

    申请日:2005-10-24

    IPC分类号: G06N5/00

    CPC分类号: G06F17/30985

    摘要: An apparatus, a carrier medium carrying computer readable code to implement a method, and a method for searching for a plurality of patterns definable by complex expressions, and further, for efficiently generating data for such searching. One method includes accepting or determining a plurality of state machines for searching for a plurality of patterns, merging the state machines to form a merged state machine, and storing a data structure describing the merged state machine, including state data on the states of the merged state machine. The method is such that pattern matching logic reading state data and accepting a sequence of inputs can search the input sequence for the plurality of patterns.

    摘要翻译: 携带计算机可读代码以实现方法的装置,载体介质以及用于搜索由复杂表达式定义的多个模式的方法,并且还用于有效地生成用于这种搜索的数据。 一种方法包括:接收或确定用于搜索多个模式的多个状态机,合并状态机以形成合并状态机,以及存储描述合并状态机的数据结构,包括关于合并状态的状态数据 状态机。 该方法使得模式匹配逻辑读取状态数据并接受输入序列可以搜索多个模式的输入序列。

    Paralleled content addressable memory search engine
    4.
    发明授权
    Paralleled content addressable memory search engine 失效
    并行内容可寻址内存搜索引擎

    公开(公告)号:US06629099B2

    公开(公告)日:2003-09-30

    申请号:US09733231

    申请日:2000-12-07

    申请人: Paul C. Cheng

    发明人: Paul C. Cheng

    IPC分类号: G06F1730

    摘要: A parallel search engine able to receive commands via a search instruction input and data words via a search data input. The commands received, which are optionally programmable, control operation of a data dispatch unit and a result dispatch unit. The data words received are sent by the data dispatch unit as search data to a CAM module array made up of CAM modules interconnected by a cascade information bus for comparison against pre-stored comparand databases. The CAM modules of the CAM module array provide search results to the result dispatch unit which generates results, typically multiple in parallel, at a result output. Optionally, multiple of the parallel search engines may be cascaded by connection to an expansion bus to form a mega search engine.

    摘要翻译: 能够通过搜索指令输入和数据字通过搜索数据输入来接收命令的并行搜索引擎。 接收到的命令(可选地可编程的)控制数据调度单元和结果分派单元的操作。 接收到的数据字由数据调度单元作为搜索数据发送到由通过级联信息总线互连的CAM模块组成的CAM模块阵列,以与预先存储的比较数据库进行比较。 CAM模块阵列的CAM模块将搜索结果提供给结果分派单元,该结果分配单元在结果输出中生成通常多并行的结果。 可选地,多个并行搜索引擎可以通过连接到扩展总线来级联以形成大型搜索引擎。