System for designing re-programmable digital hardware platforms
    1.
    发明授权
    System for designing re-programmable digital hardware platforms 失效
    用于设计可重新编程数字硬件平台的系统

    公开(公告)号:US07340693B2

    公开(公告)日:2008-03-04

    申请号:US11066070

    申请日:2005-02-24

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5054

    摘要: A digital design system and method are provided for re-programmable hardware platforms, such as field programmable gate arrays (FPGAs) and other re-programmable system designs. The design system and method bridge the gap between what has previously been a development and prototyping platform used during the design phase of an electronic design system (EDS) project, and commercially viable re-programmable product platforms to replace non-programmable platforms, such as discrete processors and ASICs.

    摘要翻译: 为可重新编程的硬件平台(例如现场可编程门阵列(FPGA)和其他可重新编程的系统设计)提供数字设计系统和方法。 设计系统和方法弥合了以前在电子设计系统(EDS)项目的设计阶段之间使用的开发和原型平台之间的差距,以及商业上可行的可重新编程的产品平台,以取代非可编程平台,例如 离散处理器和ASIC。

    System for designing re-programmable digital hardware platforms
    2.
    发明申请
    System for designing re-programmable digital hardware platforms 审中-公开
    用于设计可重新编程数字硬件平台的系统

    公开(公告)号:US20090007050A1

    公开(公告)日:2009-01-01

    申请号:US12074674

    申请日:2008-03-04

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5054

    摘要: A digital design system and method are provided for re-programmable hardware platforms, such as field programmable gate arrays (FPGAs) and other re-programmable system designs. The design system and method bridge the gap between what has previously been a development and prototyping platform used during the design phase of an electronic design system (EDS) project, and commercially viable re-programmable product platforms to replace non-programmable platforms, such as discrete processors and ASICs.

    摘要翻译: 为可重新编程的硬件平台(例如现场可编程门阵列(FPGA)和其他可重新编程的系统设计)提供数字设计系统和方法。 设计系统和方法弥合了以前在电子设计系统(EDS)项目的设计阶段之间使用的开发和原型平台之间的差距,以及商业上可行的可重新编程的产品平台,以取代非可编程平台,例如 离散处理器和ASIC。