Peltier module
    1.
    发明授权
    Peltier module 失效
    珀耳帖模块

    公开(公告)号:US5841064A

    公开(公告)日:1998-11-24

    申请号:US776186

    申请日:1997-01-24

    CPC分类号: H01L35/32

    摘要: A Peltier effect module comprising a plurality of Peltier effect elements arranged in parallel between a pair of substrates where the Peltier effect elements are connected to connection electrodes disposed on the substrates. The array of Peltier effect elements is sealed off by a hollow seal frame surrounding the Peltier effect element array with a seal formed by a bond between both end edges of the seal frame and the substrates. Because the perimeter around the Peltier effect elements is sealed using a seal frame metalically bonded at both ends to the substrates, resistance to moisture penetration is largely determined by the material from which the seal frame is made. Therefore, by appropriately selecting the seal frame materials, the Peltier effect module can be reliably protected for a long period of time against moisture penetration.

    摘要翻译: PCT No.PCT / JP96 / 01421 Sec。 371日期1997年1月24日 102(e)日期1997年1月24日PCT提交1996年5月27日PCT公布。 WO96 / 37918 PCT公开号 日期:1996年11月28日帕尔帖效应模块包括平行布置在一对基板之间的多个珀耳帖效应元件,其中帕尔帖效应元件连接到设置在基板上的连接电极。 Peltier效应元件的阵列由围绕珀尔帖效应元件阵列的中空密封框架密封,密封框架和基板的两端边缘之间的接合形成密封。 由于珀耳帖效应元件周围的周边是使用两端金属结合到基板上的密封框进行密封的,所以耐水分渗透的程度很大程度上取决于制作密封框架的材料。 因此,通过适当选择密封框架材料,可以长时间可靠地保护珀尔帖效应模块以防止水分渗透。

    Method of fabricating a thermoelectric module
    2.
    发明授权
    Method of fabricating a thermoelectric module 失效
    制造热电模块的方法

    公开(公告)号:US5950067A

    公开(公告)日:1999-09-07

    申请号:US973095

    申请日:1998-03-19

    摘要: A method of fabricating a thermoelectric module in which a plurality of thermoelectric chips are arranged in a matrix between first and second dielectric substrates and electrically connected in series so as to heat one of the substrates and cool the other substrate. Elongated thermoelectric bars of P-type and N-type to be cut into the chips are employed together with a first conductive plate having a plurality of first contacts arranged in a matrix pattern. Adjacent first contacts spaced along the row are interconnected by horizontal bridges. The method of the present invention comprises the steps of integrating the first conductive plate to the first substrate to support the first conductive plate thereby; placing a plurality of the bars of the P-type and N-type on the first contacts along the rows in such a manner that the P-type bars alternate with the N-type bars in a spaced relation along the column; bonding each bar on its one face to the first contacts; cutting each bar into the chips and cutting the horizontal bridges simultaneously to allocate the chips on the individual first contacts; placing a plurality of second contacts of a second substrate onto the chips to form a series electric circuit of the chips in combination with the first contacts, and bonding the second substrate supporting the second contacts to the first substrate.

    摘要翻译: PCT No.PCT / JP97 / 01797 Sec。 371日期:1998年3月19日 102(e)1998年3月19日PCT PCT 1997年6月3日PCT公布。 公开号WO97 / 45882 日期1997年12月4日一种制造热电模块的方法,其中多个热电芯片以矩阵形式布置在第一和第二电介质基板之间并串联电连接以加热其中一个基板并冷却另一个基板。 将要切割成芯片的P型和N型的细长热电棒与具有以矩阵图案排列的多个第一触头的第一导电板一起使用。 沿着行间隔的相邻的第一接触件通过水平桥互连。 本发明的方法包括以下步骤:将第一导电板与第一基板集成,从而支撑第一导电板; 沿着行将P型和N型的多个条放置在第一触点上,使得P型条以与柱相隔的关系与N型条交替; 将其一个面上的每个条连接到第一触点; 将每个棒切割成芯片并同时切割水平桥,以将芯片分配在单独的第一触点上; 将第二基板的多个第二触点放置在芯片上以与第一触点组合形成芯片的串联电路,以及将支撑第二触点的第二基板接合到第一基板。