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公开(公告)号:US10147717B2
公开(公告)日:2018-12-04
申请号:US15247943
申请日:2016-08-26
Applicant: Novatek Microelectronics Corp.
Inventor: Federico Agustin Altolaguirre , Ming-Dou Ker , Tzu-Chien Tzeng , Ju-Lin Huang
Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.
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公开(公告)号:US20170069618A1
公开(公告)日:2017-03-09
申请号:US15247943
申请日:2016-08-26
Applicant: Novatek Microelectronics Corp.
Inventor: Federico Agustin Altolaguirre , Ming-Dou Ker , Tzu-Chien Tzeng , Ju-Lin Huang
CPC classification number: H01L27/0262 , H01L27/0292 , H01L27/0635 , H02H9/046
Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.
Abstract translation: 在本公开中,静电放电(ESD)保护电路耦合在第一电源轨和第二电源轨之间以排放任何ESD应力。 ESD保护电路包括检测电路,触发电路和双可控硅整流器(DSCR)装置。 当ESD应力施加到第一或第二电力轨时,检测电路可以首先检测ESD应力并将检测信号输出到触发电路。 触发电路基于检测信号和ESD应力的极性产生触发信号。 然后,基于在同一类型的至少两个晶体管之间的公共节点处接收的触发信号来对称地触发DSCR设备。 示例性ESD保护电路可以在纳米级制造的集成电路中实现,并且在保持低待机漏电流和相对较小的硅封装的同时实现良好的ESD鲁棒性。
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