公开(公告)号：US10602177B1

公开(公告)日：2020-03-24

申请号：US16147888

申请日：2018-10-01

Applicant: Novatek Microelectronics Corp.

Inventor： Yi-Hung Huang ,  Hsiao-En Chang ,  Jia-Lin Liao

IPC: H04N19/513 ,  H04N19/182 ,  H04N19/176

Abstract: A frame rate up-conversion (FRC) apparatus and an operation method thereof are provided. A motion vector (MV) generation circuit provides an MV of a current pixel of an interpolation frame. According to the MV, a data fetch circuit fetches first original data of a first pixel in a first original frame and second original data of a second pixel in a second original frame. According to a position of the first pixel in the first original frame and a position of the second pixel in the second original frame, a boundary processing circuit processes the first original data and the second original data to generate first processed data and second processed data. An interpolation frame generating circuit generates pixel data of the current pixel of the interpolation frame according to the first processed data and the second processed data.