公开(公告)号：US20180276784A1

公开(公告)日：2018-09-27

申请号：US15470673

申请日：2017-03-27

Applicant: Oracle International Corporation

Inventor： Venkatanathan Varadarajan ,  Arun Henry Benjamin Raghavan ,  Sam Idicula ,  Nipun Agarwal

IPC: G06T1/20 ,  G06T1/60

CPC classification number: G06T1/20 ,  G06K9/00986 ,  G06K9/4614

Abstract: Techniques are provided herein for generating an integral image of an input image in parallel across the cores of a multi-core processor. The input image is split into a plurality of tiles, each of which is stored in a scratchpad memory associated with a distinct core. At each tile, a partial integral image of the tile is first computed over the tile, using a Single-Pass Algorithm. This is followed by aggregating partial sums belonging to subsets of tiles using a 2D Inclusive Parallel Prefix Algorithm. A summation is finally performed over the aggregated partial sums to generate the integral image over the entire input image.