公开(公告)号：US11909998B2

公开(公告)日：2024-02-20

申请号：US16906993

申请日：2020-06-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Che-Wei Kuo ,  JIng Ya Li ,  Chong Soon Lim ,  Han Boon Teo ,  Hai Wei Sun ,  Rohith Mars ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/50 ,  H04N19/124 ,  H04N19/176 ,  H04N19/186 ,  H04N19/96

CPC classification number: H04N19/50 ,  H04N19/124 ,  H04N19/176 ,  H04N19/186 ,  H04N19/96

Abstract: An encoder includes circuitry and memory. The circuitry determines whether a first virtual pipeline decoding unit (VPDU) is split into smaller blocks and whether a second VPDU is split into smaller blocks. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is split into smaller blocks, a block of chroma samples is predicted without using luma samples. In response to a determination the first VPDU is split into smaller blocks and a determination the second VPDU is split into smaller blocks, the block of chroma samples is predicted using luma samples. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is not split into smaller block, the block of chroma samples is predicted using luma samples. The block is encoded using the predicted chroma samples.