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公开(公告)号:US20180096759A1
公开(公告)日:2018-04-05
申请号:US15558715
申请日:2017-04-26
Inventor: YASUHARU KINOSHITA , SHOJI HOSHITOKU , HIRONORI TSUBOTA , YASUHIRO KASHIMA
Abstract: A chip resistor includes a resistive element, first and second electrodes disposed on a lower surface the resistive element, a protective film disposed on the lower surface of the resistive element and between the first and second electrodes. The resistive element has first and second recesses therein. The first recess extends from the lower surface along a first edge surface and does not reach an upper surface of the resistive element. The second recess extends from the lower surface along a second edge surface and does not reach the upper surface of the resistive element. The first and second electrodes are disposed between the first and second recesses. The protective film is disposed between the first and second electrodes. A first plating layer disposed on the first electrode and an inner surface of the first recess. A second plating layer is disposed on the second electrode and an inner surface of the second recess. This chip resistor avoids mounting failures.