Method and apparatus for instruction scheduling in an optimizing
compiler for minimizing overhead instructions
    1.
    发明授权
    Method and apparatus for instruction scheduling in an optimizing compiler for minimizing overhead instructions 失效
    用于最优化编译器中用于最小化开销指令的指令调度的方法和装置

    公开(公告)号:US5835776A

    公开(公告)日:1998-11-10

    申请号:US560089

    申请日:1995-11-17

    IPC分类号: G06F9/38 G06F9/45 G06F9/44

    CPC分类号: G06F8/4452

    摘要: Apparatus and methods are disclosed for scheduling target program instructions during the code optimization pass of an optimizing compiler. Most modern microprocessors have the ability to issue multiple instructions in one clock cycle and/or possess multiple pipelined functional units. They also have the ability to add two values to form the address within memory load and store instructions. In such microprocessors this invention can, where applicable, accelerate the execution of modulo-scheduled loops. The invention consists of a technique to achieve this speed up by systematically reducing the number of certain overhead instructions in modulo scheduled loops. The technique involves identifying reducible overhead instructions, scheduling the balance of the instructions with normal modulo scheduling procedures and then judiciously inserting no more than three copies of the reducible instructions into the schedule.

    摘要翻译: 公开了用于在优化编译器的代码优化过程期间调度目标程序指令的装置和方法。 大多数现代微处理器具有在一个时钟周期内发出多个指令和/或具有多个流水线功能单元的能力。 他们还可以添加两个值来形成内存加载和存储指令中的地址。 在这样的微处理器中,本发明可以在适用的情况下加速模数调度循环的执行。 本发明包括通过系统地减少模数调度循环中某些开销指令的数量来实现该加速的技术。 该技术涉及识别可缩减的开销指令,用正常的模调度程序调度指令的平衡,然后明智地将不多于3个可还原指令的副本插入到进度表中。

    Method and apparatus for time-reversed instruction scheduling with
modulo constraints in an optimizing compiler
    2.
    发明授权
    Method and apparatus for time-reversed instruction scheduling with modulo constraints in an optimizing compiler 失效
    用于优化编译器中模数约束的时间反转指令调度的方法和装置

    公开(公告)号:US5867711A

    公开(公告)日:1999-02-02

    申请号:US560060

    申请日:1995-11-17

    IPC分类号: G06F9/45 G06F9/44

    CPC分类号: G06F8/4452

    摘要: Apparatus and methods are disclosed for performing time-reversed scheduling of a data dependency graph representing a target program instruction loop in an optimizing compiler. The instruction scheduling function is the modulo scheduling function of an optimizing compiler and it is noted that the time-reverse transforms preserve all modulo constraints. Most modern microprocessors have the ability to issue multiple instructions in one clock cycle and/or possess multiple pipelined functional units and typically contain multi-level memory devices such as on-chip cache, off-chip cache as well as main memory. For such microprocessors this invention can, where applicable, accelerate the process of modulo-scheduling loops in the target program code. The invention consists of a technique to transform the data dependency graph of the target program instruction loop in order to produce an improved schedule of the loop instructions.

    摘要翻译: 公开了用于对表示优化编译器中的目标程序指令循环的数据依赖图进行时间反转调度的装置和方法。 指令调度功能是优化编译器的模调度功能,并且注意到时间 - 反向变换保留所有模数约束。 大多数现代微处理器具有在一个时钟周期内发出多个指令和/或拥有多个流水线功能单元的能力,并且通常包含多级存储器件,例如片上高速缓存,片外高速缓存以及主存储器。 对于这样的微处理器,本发明可以在适用的情况下加速目标程序代码中的模调度循环的过程。 本发明包括一种技术,用于转换目标程序指令循环的数据依赖图,以便产生改进的循环指令调度。

    Method and apparatus for optimizing program loops containing
omega-invariant statements
    3.
    发明授权
    Method and apparatus for optimizing program loops containing omega-invariant statements 失效
    用于优化包含欧米茄不变量语句的程序循环的方法和装置

    公开(公告)号:US6026240A

    公开(公告)日:2000-02-15

    申请号:US609035

    申请日:1996-02-29

    IPC分类号: G06F9/45

    CPC分类号: G06F8/452 G06F8/443

    摘要: Apparatus, methods, and computer program products are disclosed for optimizing programs containing single basic block natural loops with a determinable number of iterations. The invention optimizes, for execution speed, such program loops containing statements that are initially variant, but stabilize and become invariant after some number of iterations of the loop. The invention optimizes the loop by unwinding iterations from the loop for which the statements are variant, and by hoisting the stabilized statement from subsequent iterations of the loop.

    摘要翻译: 公开了装置,方法和计算机程序产品,用于优化包含具有可确定次数的迭代的单个基本块自然循环的程序。 本发明针对执行速度优化了包含最初变化的语句的程序循环,但是在循环的一些迭代次数之后稳定并变得不变。 本发明通过展开来自循环的迭代来优化循环,语句是不同的,并且通过将稳定的语句从循环的后续迭代中提升。

    Method and apparatus for an improved code optimizer for pipelined
computers
    5.
    发明授权
    Method and apparatus for an improved code optimizer for pipelined computers 失效
    用于流水线计算机的改进的代码优化器的方法和装置

    公开(公告)号:US5930510A

    公开(公告)日:1999-07-27

    申请号:US752683

    申请日:1996-11-19

    IPC分类号: G06F9/38 G06F9/45 G06F9/44

    CPC分类号: G06F8/4452

    摘要: Apparatus, methods, systems and computer program products are disclosed to provide improved optimizations of single-basic-block-loops. These optimizations include improved scheduling of blocking instructions for pipelined computers and improved scheduling and allocation of resources (such as registers) that cannot be spilled to memory. Scheduling of blocking instructions is improved by pre-allocating space in the scheduling reservation table. Improved scheduling and allocation of non-spillable resources results from converting the resource constraint into a data dependency constraint.

    摘要翻译: 公开了装置,方法,系统和计算机程序产品以提供单基本块循环的改进的优化。 这些优化包括对流水线计算机的阻塞指令的改进调度以及不能溢出到存储器的资源(例如寄存器)的改进的调度和分配。 通过在调度预约表中预先分配空间来改进阻塞指令的调度。 通过将资源约束转换为数据依赖约束,可以改善非溢出资源的调度和分配。