摘要:
A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.
摘要:
A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.
摘要:
A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.
摘要:
A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.
摘要:
A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).
摘要:
A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.
摘要:
A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).
摘要:
A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator substrate (UTSOI) is disclosed. The UTSOI substrate is formed by providing a handle wafer comprising a mechanical substrate and an insulator layer substantially overlying the mechanical substrate. A donor wafer is provided. Hydrogen is implanted in the donor wafer to form a bubble layer. The donor wafer is doped with at least one dopant to form a doped layer proximal to the bubble layer. The handle wafer and the donor wafer are bonded between the insulator layer of the handle wafer and a surface of the donor wafer proximal to the doped layer to form a combined wafer having a portion substantially underlying the bubble layer. The portion of the combined wafer substantially underlying the bubble layer is removed so as to expose a seed layer. An epitaxial layer is grown substantially overlying the seed layer, wherein at least one dopant diffuse into the epitaxial layer. At the completion of the growing of the epitaxial layer, there exists a net dopant concentration in the seed layer and the epitaxial layer which has maximum value at or near an interface between the seed layer and the insulator layer.
摘要:
A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator substrate (UTSOI) is disclosed. The UTSOI substrate is formed by providing a handle wafer comprising a mechanical substrate and an insulator layer substantially overlying the mechanical substrate. A donor wafer is provided. Hydrogen is implanted in the donor wafer to form a bubble layer. The donor wafer is doped with at least one dopant to form a doped layer proximal to the bubble layer. The handle wafer and the donor wafer are bonded between the insulator layer of the handle wafer and a surface of the donor wafer proximal to the doped layer to form a combined wafer having a portion substantially underlying the bubble layer. The portion of the combined wafer substantially underlying the bubble layer is removed so as to expose a seed layer. An epitaxial layer is grown substantially overlying the seed layer, wherein at least one dopant diffuse into the epitaxial layer. At the completion of the growing of the epitaxial layer, there exists a net dopant concentration in the seed layer and the epitaxial layer which has maximum value at or near an interface between the seed layer and the insulator layer.
摘要:
A rod system includes two rods each with a head and a shaft, two elastic members each fitted around one shaft against one head, and a case defining a first inner portion, a second inner portion, and a third inner portion in communication with the first and the second inner portions. A first rod with a first elastic member is seated in the first inner portion so the first elastic member abuts the bottom of first inner portion and the first head protrudes into the third inner portion. A second rod and a second elastic member is seated in the second portion so the second elastic member abuts the bottom of the second inner portion and the second head protrudes into the third inner portion and abuts the first head.