High Dynamic Range CMOS Pixel and Method of Operating Same
    1.
    发明申请
    High Dynamic Range CMOS Pixel and Method of Operating Same 审中-公开
    高动态范围CMOS像素和操作方法相同

    公开(公告)号:US20120056080A1

    公开(公告)日:2012-03-08

    申请号:US13236452

    申请日:2011-09-19

    IPC分类号: G01J1/42

    CPC分类号: H04N5/3592

    摘要: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.

    摘要翻译: 公开了一种操作CMOS像素的方法。 CMOS像素包括光电二极管(PPD),耦合到PPD的传输栅极和耦合到传输栅极的抗散花漏极。 在PPD和传输门下方的势阱之间形成势垒。 在第一积分时间期间,响应于电磁辐射,电荷在电位阱中累积。 过量的电荷从潜在的阱移除到超过第一势垒的防开裂漏极。 势垒的大小增加。 在第二次积分时间期间,电荷积聚在势阱中。

    HIGH DYNAMIC RANGE CMOS PIXEL AND METHOD OF OPERATING SAME
    2.
    发明申请
    HIGH DYNAMIC RANGE CMOS PIXEL AND METHOD OF OPERATING SAME 有权
    高动态范围CMOS像素及其操作方法

    公开(公告)号:US20120056079A1

    公开(公告)日:2012-03-08

    申请号:US13223991

    申请日:2011-09-01

    IPC分类号: G01J1/42

    CPC分类号: H04N5/3592

    摘要: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.

    摘要翻译: 公开了一种操作CMOS像素的方法。 CMOS像素包括光电二极管(PPD),耦合到PPD的传输栅极和耦合到传输栅极的抗散花漏极。 在PPD和传输门下方的势阱之间形成势垒。 在第一积分时间期间,响应于电磁辐射,电荷在电位阱中累积。 过量的电荷从潜在的阱移除到超过第一势垒的防开裂漏极。 势垒的大小增加。 在第二次积分时间期间,电荷积聚在势阱中。

    High dynamic range CMOS pixel and method of operating same
    3.
    发明授权
    High dynamic range CMOS pixel and method of operating same 有权
    高动态范围的CMOS像素和操作方法相同

    公开(公告)号:US08766157B2

    公开(公告)日:2014-07-01

    申请号:US13223991

    申请日:2011-09-01

    IPC分类号: H01L31/062 H01L31/113

    CPC分类号: H04N5/3592

    摘要: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.

    摘要翻译: 公开了一种操作CMOS像素的方法。 CMOS像素包括光电二极管(PPD),耦合到PPD的传输栅极和耦合到传输栅极的抗散花漏极。 在PPD和传输门下方的势阱之间形成势垒。 在第一积分时间期间,响应于电磁辐射,电荷在电位阱中累积。 过量的电荷从潜在的阱移除到超过第一势垒的防开裂漏极。 势垒的大小增加。 在第二次积分时间期间,电荷积聚在势阱中。

    Night vision CMOS imager with optical pixel cavity
    4.
    发明授权
    Night vision CMOS imager with optical pixel cavity 有权
    夜视CMOS成像器具有光学像素腔

    公开(公告)号:US08654232B2

    公开(公告)日:2014-02-18

    申请号:US13215799

    申请日:2011-08-23

    IPC分类号: H04N3/14 H01L31/062

    摘要: A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.

    摘要翻译: 公开了像素设计。 像素包括光敏元件。 基本上覆盖光敏元件的第一反射层。 第二反射层基本上位于感光元件下面,并且形成与第一反射层相对于光子吸收不共振的空腔。 在第一反射层或第二反射层中形成孔。 当电磁辐射进入孔径时,第一反射层和第二反射层构造成基本上彼此相对地反射电磁辐射,直到基本上被吸收在空腔中。

    CMOS imager with companded column signals
    5.
    发明授权
    CMOS imager with companded column signals 有权
    具有压缩列信号的CMOS成像器

    公开(公告)号:US08558160B2

    公开(公告)日:2013-10-15

    申请号:US13114694

    申请日:2011-05-24

    IPC分类号: H01L27/146

    CPC分类号: H04N5/378 H04N5/35509

    摘要: A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).

    摘要翻译: 提供片内,每列模数转换器(ADC)中的非线性转换能力以扩展压缩模拟信号,使得所得到的数字输出具有预定的(线性或非线性)映射 相对于输入光信号到一行像素的输入亮度水平。 预定的映射也可以由耦合到线性或非线性ADC的非线性放大器提供,并且在ADC的输出端产生的压缩非线性数字表示基本上由片上或片外 查找表(LUT)。

    NIGHT VISION CMOS IMAGER WITH OPTICAL PIXEL CAVITY

    公开(公告)号:US20120050554A1

    公开(公告)日:2012-03-01

    申请号:US13215799

    申请日:2011-08-23

    IPC分类号: H04N5/225

    摘要: A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.

    摘要翻译: 公开了像素设计。 像素包括光敏元件。 基本上覆盖光敏元件的第一反射层。 第二反射层基本上位于感光元件下面,并且形成与第一反射层相对于光子吸收不共振的空腔。 在第一反射层或第二反射层中形成孔。 当电磁辐射进入孔径时,第一反射层和第二反射层构造成基本上彼此相对地反射电磁辐射,直到基本上被吸收在空腔中。

    CMOS IMAGER WITH COMPANDED COLUMN SIGNALS
    7.
    发明申请
    CMOS IMAGER WITH COMPANDED COLUMN SIGNALS 有权
    CMOS IMAGER WITH COMPEDED COLUMN SIGNALS

    公开(公告)号:US20110290983A1

    公开(公告)日:2011-12-01

    申请号:US13114694

    申请日:2011-05-24

    IPC分类号: H01L27/146

    CPC分类号: H04N5/378 H04N5/35509

    摘要: A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).

    摘要翻译: 提供片内,每列模数转换器(ADC)中的非线性转换能力以扩展压缩模拟信号,使得所得到的数字输出具有预定的(线性或非线性)映射 相对于输入光信号到一行像素的输入亮度水平。 预定的映射也可以由耦合到线性或非线性ADC的非线性放大器提供,并且在ADC的输出端产生的压缩非线性数字表示基本上由片上或片外 查找表(LUT)。

    Back-illuminated imager using ultra-thin silicon on insulator substrates
    8.
    发明授权
    Back-illuminated imager using ultra-thin silicon on insulator substrates 有权
    背照式成像器使用超薄硅绝缘体基板

    公开(公告)号:US07855128B2

    公开(公告)日:2010-12-21

    申请号:US12472722

    申请日:2009-05-27

    IPC分类号: H01L21/302

    摘要: A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator substrate (UTSOI) is disclosed. The UTSOI substrate is formed by providing a handle wafer comprising a mechanical substrate and an insulator layer substantially overlying the mechanical substrate. A donor wafer is provided. Hydrogen is implanted in the donor wafer to form a bubble layer. The donor wafer is doped with at least one dopant to form a doped layer proximal to the bubble layer. The handle wafer and the donor wafer are bonded between the insulator layer of the handle wafer and a surface of the donor wafer proximal to the doped layer to form a combined wafer having a portion substantially underlying the bubble layer. The portion of the combined wafer substantially underlying the bubble layer is removed so as to expose a seed layer. An epitaxial layer is grown substantially overlying the seed layer, wherein at least one dopant diffuse into the epitaxial layer. At the completion of the growing of the epitaxial layer, there exists a net dopant concentration in the seed layer and the epitaxial layer which has maximum value at or near an interface between the seed layer and the insulator layer.

    摘要翻译: 公开了一种在超薄半导体绝缘体衬底(UTSOI)上制造背照式半导体成像器件的方法。 UTSOI衬底通过提供包括机械衬底和基本上覆盖机械衬底的绝缘体层的手柄晶片形成。 提供施主晶片。 将氢气注入施主晶片中以形成气泡层。 施主晶片掺杂有至少一种掺杂剂以形成靠近气泡层的掺杂层。 处理晶片和施主晶片结合在处理晶片的绝缘体层和施主晶片的表面之间,以接近于掺杂层,以形成具有基本上位于气泡层下面的部分的组合晶片。 基本上在气泡层下面的组合晶片的部分被去除以暴露种子层。 生长基本上覆盖种子层的外延层,其中至少一种掺杂剂扩散到外延层中。 在外延层生长完成后,晶种层和外延层中存在净掺杂剂浓度,其在种子层和绝缘体层之间的界面处或附近具有最大值。

    BACK-ILLUMINATED IMAGER USING ULTRA-THIN SILICON ON INSULATOR SUBSTRATES
    9.
    发明申请
    BACK-ILLUMINATED IMAGER USING ULTRA-THIN SILICON ON INSULATOR SUBSTRATES 有权
    在绝缘子基板上使用超薄硅的反向照明成像

    公开(公告)号:US20090298260A1

    公开(公告)日:2009-12-03

    申请号:US12472722

    申请日:2009-05-27

    IPC分类号: H01L21/762

    摘要: A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator substrate (UTSOI) is disclosed. The UTSOI substrate is formed by providing a handle wafer comprising a mechanical substrate and an insulator layer substantially overlying the mechanical substrate. A donor wafer is provided. Hydrogen is implanted in the donor wafer to form a bubble layer. The donor wafer is doped with at least one dopant to form a doped layer proximal to the bubble layer. The handle wafer and the donor wafer are bonded between the insulator layer of the handle wafer and a surface of the donor wafer proximal to the doped layer to form a combined wafer having a portion substantially underlying the bubble layer. The portion of the combined wafer substantially underlying the bubble layer is removed so as to expose a seed layer. An epitaxial layer is grown substantially overlying the seed layer, wherein at least one dopant diffuse into the epitaxial layer. At the completion of the growing of the epitaxial layer, there exists a net dopant concentration in the seed layer and the epitaxial layer which has maximum value at or near an interface between the seed layer and the insulator layer.

    摘要翻译: 公开了一种在超薄半导体绝缘体衬底(UTSOI)上制造背照式半导体成像器件的方法。 UTSOI衬底通过提供包括机械衬底和基本上覆盖机械衬底的绝缘体层的手柄晶片形成。 提供施主晶片。 将氢气注入施主晶片中以形成气泡层。 施主晶片掺杂有至少一种掺杂剂以形成靠近气泡层的掺杂层。 处理晶片和施主晶片结合在处理晶片的绝缘体层和施主晶片的表面之间,以接近于掺杂层,以形成具有基本上位于气泡层下面的部分的组合晶片。 基本上在气泡层下面的组合晶片的部分被去除以暴露种子层。 生长基本上覆盖种子层的外延层,其中至少一种掺杂剂扩散到外延层中。 在外延层生长完成后,晶种层和外延层中存在净掺杂剂浓度,其在种子层和绝缘体层之间的界面处或附近具有最大值。

    ROD SYSTEM FOR GRADUAL DYNAMIC SPINAL FIXATION
    10.
    发明申请
    ROD SYSTEM FOR GRADUAL DYNAMIC SPINAL FIXATION 有权
    脊柱动力学脊柱固定系统

    公开(公告)号:US20130261667A1

    公开(公告)日:2013-10-03

    申请号:US13376502

    申请日:2010-08-20

    IPC分类号: A61B17/70

    摘要: A rod system includes two rods each with a head and a shaft, two elastic members each fitted around one shaft against one head, and a case defining a first inner portion, a second inner portion, and a third inner portion in communication with the first and the second inner portions. A first rod with a first elastic member is seated in the first inner portion so the first elastic member abuts the bottom of first inner portion and the first head protrudes into the third inner portion. A second rod and a second elastic member is seated in the second portion so the second elastic member abuts the bottom of the second inner portion and the second head protrudes into the third inner portion and abuts the first head.

    摘要翻译: 杆系统包括两个杆,每个杆具有头部和轴,两个弹性构件,每个弹性构件围绕一个轴围绕一个头部安装;以及壳体,其限定第一内部部分,第二内部部分和与第一内部部分连通的第三内部部分 和第二内部部分。 具有第一弹性构件的第一杆被安置在第一内部部分中,使得第一弹性构件邻接第一内部部分的底部,并且第一头部突出到第三内部部分中。 第二杆和第二弹性构件位于第二部分中,使得第二弹性构件邻接第二内部部分的底部,并且第二头部突出到第三内部部分中并邻接第一头部。