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公开(公告)号:US07924845B2
公开(公告)日:2011-04-12
申请号:US10673665
申请日:2003-09-30
CPC分类号: G06F11/261 , G06F17/5027
摘要: Message send and receive blocks are provided to emulation ICs and reconfigurable interconnect ICs of an emulation system to reduce the multiplexed transfer latency of critical emulation signals. Each of a corresponding pair of a message send block and a message receive block is provided with a signal state value inclusion schedule to control operation of the message send and receive blocks. The signal state inclusion schedule calls for some signals within a message to be sent more often than other signals within the message. In some embodiments a parity value is implemented as part the message and included in the signal state inclusion schedule.
摘要翻译: 消息发送和接收块被提供给仿真系统的仿真IC和可重配置互连IC,以减少关键仿真信号的复用传输延迟。 相应的消息发送块和消息接收块中的每一个被提供有信号状态值包含调度以控制消息发送和接收块的操作。 信号状态包含调度要求消息内的一些信号比消息内的其他信号更频繁地发送。 在一些实施例中,奇偶校验值被实现为消息的一部分并且被包括在信号状态包含调度中。
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公开(公告)号:US20050068949A1
公开(公告)日:2005-03-31
申请号:US10673665
申请日:2003-09-30
CPC分类号: G06F11/261 , G06F17/5027
摘要: Message send and receive blocks are provided to emulation ICs and reconfigurable interconnect ICs of an emulation system to reduce the multiplexed transfer latency of critical emulation signals. Each of a corresponding pair of a message send block and a message receive block is provided with a signal state value inclusion schedule to control operation of the message send and receive blocks. The signal state inclusion schedule calls for some signals within a message to be sent more often than other signals within the message. In some embodiments a parity value is implemented as part the message and included in the signal state inclusion schedule.
摘要翻译: 消息发送和接收块被提供给仿真系统的仿真IC和可重配置互连IC,以减少关键仿真信号的复用传输延迟。 相应的消息发送块和消息接收块中的每一个被提供有信号状态值包含调度以控制消息发送和接收块的操作。 信号状态包含调度要求消息内的一些信号比消息内的其他信号更频繁地发送。 在一些实施例中,奇偶校验值被实现为消息的一部分并且被包括在信号状态包含调度中。
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