公开(公告)号：US20230386551A1

公开(公告)日：2023-11-30

申请号：US18249925

申请日：2021-10-20

Applicant: QUALCOMM INCORPORATED

Inventor： Pranav AGRAWAL ,  Akash SUTHAR ,  Aman CHHETRY ,  Kunal DESAI

IPC: G11C11/406

CPC classification number: G11C11/40618 ,  G11C11/40615

Abstract: A kernel of an HLOS may originate one or more memory refresh requests. Each memory refresh request may have a first memory address range and a size value. A resource power manager may be coupled to the kernel and coupled to memory. The memory may have a plurality of memory ranks. The resource power manger may receive a memory refresh request from the kernel. The resource power manager may then determine if the plurality of memory ranks is either symmetrical or asymmetrical. If the memory ranks are symmetrical, then the resource power manager distributes the memory refresh request evenly and in a parallel manner across the symmetrical memory ranks. If the memory ranks are asymmetrical, then the resource power manager will then determine if the memory refresh request should be one of: a linear only memory refresh; an interleave with linear memory refresh; or an interleave only memory refresh.