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    EFFICIENT HARDWARE DISPATCHING OF CONCURRENT FUNCTIONS IN MULTICORE PROCESSORS, AND RELATED PROCESSOR SYSTEMS, METHODS, AND COMPUTER-READABLE MEDIA
    2.
    发明申请
    EFFICIENT HARDWARE DISPATCHING OF CONCURRENT FUNCTIONS IN MULTICORE PROCESSORS, AND RELATED PROCESSOR SYSTEMS, METHODS, AND COMPUTER-READABLE MEDIA 审中-公开
    多核处理器中相关函数的有效硬件分配以及相关处理器系统，方法和计算机可读介质

    公开(公告)号：US20150127927A1

    公开(公告)日：2015-05-07

    申请号：US14224619

    申请日：2014-03-25

    Applicant: QUALCOMM INCORPORATED

    Inventor： Michael William Paddon ,  Erik Asmussen de Castro Lopo ,  Matthew Christian Duggan ,  Kento Tarui ,  Craig Matthew Brown

    IPC: G06F9/30

    CPC classification number: G06F9/30043 ,  G06F9/3009 ,  G06F9/3851

    Abstract: Embodiments of the disclosure provide efficient hardware dispatching of concurrent functions in multicore processors, and related processor systems, methods, and computer-readable media. In one embodiment, a first instruction indicating an operation requesting a concurrent transfer of program control is detected in a first hardware thread of a multicore processor. A request for the concurrent transfer of program control is enqueued in a hardware first-in-first-out (FIFO) queue. A second instruction indicating an operation dispatching the request for the concurrent transfer of program control in the hardware FIFO queue is detected in a second hardware thread of the multicore processor. The request for the concurrent transfer of program control is dequeued from the hardware FIFO queue, and the concurrent transfer of program control is executed in the second hardware thread. In this manner, functions may be efficiently and concurrently dispatched in context of multiple hardware threads, while minimizing contention management overhead.

    Abstract translation: 本公开的实施例提供了在多核处理器以及相关处理器系统，方法和计算机可读介质中的并发功能的有效硬件调度。 在一个实施例中，在多核处理器的第一硬件线程中检测指示执行程序控制的并行传送的操作的第一指令。 对并行传送程序控制的请求在先进先出（FIFO）先进先出队列中排队。 指示在多核处理器的第二硬件线程中检测指示在硬件FIFO队列中并行传送程序控制的请求的操作的第二指令。 程序控制的并发传输请求从硬件FIFO队列出发，并在第二个硬件线程中执行程序控制的并发传输。 以这种方式，可以在多个硬件线程的上下文中有效地和并发地调度功能，同时最小化争用管理开销。

    MECHANISM FOR TRACKING TAINTED DATA
    3.
    发明申请
    MECHANISM FOR TRACKING TAINTED DATA 审中-公开
    跟踪数据的机制

    公开(公告)号：US20160232346A1

    公开(公告)日：2016-08-11

    申请号：US14615321

    申请日：2015-02-05

    Applicant: QUALCOMM Incorporated

    Inventor： Michael William Paddon ,  Matthew Christian Duggan ,  Craig Brown ,  Kento Tarui

    IPC: G06F21/55 ,  G06F21/60

    CPC classification number: G06F21/552 ,  G06F21/52 ,  G06F21/60 ,  G06F2221/034

    Abstract: The disclosure relates in some aspects to protecting systems and data from maliciously caused destruction. Data integrity is maintained by monitoring data to detect and prevent potential attacks. A mechanism for tracking whether data is tainted is implemented in a Data Flow computer architecture or some other suitable architecture. In some aspects, a taint checking mechanism is implemented within a register file, memory management, and an instruction set of such an architecture. To this end, an indication of whether the data stored in a given physical memory location is tainted is stored along with the physical memory location. For example, a register can include a bit for a corresponding taint flag, a memory page can include a bit for a corresponding taint flag, and an input/output (I/O) port can include a bit for a corresponding taint flag.

    Abstract translation: 本公开在一些方面涉及保护系统和数据免受恶意引起的破坏。 通过监控数据来维护数据完整性，以检测和防止潜在的攻击。 用于跟踪数据是否被污染的机制是在数据流计算机体系结构或其他合适的架构中实现的。 在一些方面，在寄存器文件，存储器管理以及这种架构的指令集中实现污点检查机制。 为此，存储在给定物理存储器位置中的数据是否被污染的指示与物理存储器位置一起存储。 例如，寄存器可以包括用于相应污点标志的位，存储器页面可以包括用于相应污点标志的位，并且输入/输出（I / O）端口可以包括用于相应污点标志的位。

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