公开(公告)号：US11916026B2

公开(公告)日：2024-02-27

申请号：US16535012

申请日：2019-08-07

Applicant: QUALCOMM Incorporated

Inventor： Jongshick Ahn ,  Iulian Mirea ,  Chung-Ti Hsu

IPC: H01L23/64

CPC classification number: H01L23/642

Abstract: In certain aspects, a clamp includes first and second transistors coupled in series between a power bus and a ground. The clamp also includes a resistive voltage divider configured to bias a gate of the first transistor and a gate of the second transistor based on a supply voltage on the power bus. The clamp further includes a capacitive voltage divider configured to turn on the first and second transistors in response to a voltage transient on the power bus exceeding a trigger threshold voltage.