公开(公告)号：US20230231586A1

公开(公告)日：2023-07-20

申请号：US17580320

申请日：2022-01-20

Applicant: QUALCOMM Incorporated

Inventor： Xingyi HUA ,  Bassel HANAFI ,  Karthik TRIPURARI JAYARAMAN ,  Francesco GATTA

IPC: H04B1/04 ,  H03F1/56

CPC classification number: H04B1/0483 ,  H03F1/565 ,  H04B2001/0416 ,  H03F2200/451

Abstract: Aspects of the disclosure relate to devices, wireless communication apparatuses, methods, and circuitry implementing a low noise amplifier (LNA) with phase-shifting circuitry to achieve a continuous phase at the output of the LNA. One aspect is an amplifier including a high gain active path comprising active circuitry, and a low gain path comprising passive circuitry and phase-shifting circuitry. In one or more aspects, the phase-shifting circuitry is configured to shift a phase of an input signal within the low gain path such that the phase of an output signal outputted from the low gain path approximately matches a phase of an output signal outputted from the high gain active path. In at least one aspect, a gain of the high gain active path is higher than a gain of the low gain passive path.

公开(公告)号：US20230327693A1

公开(公告)日：2023-10-12

申请号：US17658379

申请日：2022-04-07

Applicant: QUALCOMM Incorporated

Inventor： Karthik TRIPURARI JAYARAMAN ,  Bao Huu LAM ,  Xingyi HUA

IPC: H04B1/10 ,  H04K3/00 ,  H03F1/26 ,  H04B1/04 ,  H03H7/01

CPC classification number: H04B1/1036 ,  H04K3/20 ,  H03F1/26 ,  H04B1/0475 ,  H03H7/01 ,  H04B1/0458 ,  H03H2007/013

Abstract: Techniques for providing low-cost and effective jammer rejection for an amplifier is disclosed. The amplifier includes an input node and an output node, a first transistor and a second transistor, a load circuitry, an inductor, and a capacitor. A first terminal of the first transistor is coupled to a ground. A second terminal of the first transistor is coupled to a first terminal of the second transistor. A second terminal of the second transistor is coupled to the output node. The load circuitry is coupled between a power supply and the second terminal of the second transistor. A first terminal of the inductor is coupled to the ground through a first switch. A first terminal of the capacitor is coupled to the first terminal of the second transistor and a second terminal of the capacitor is coupled to a second terminal of the inductor.