Direct memory access rate limiting in a communication device
    1.
    发明授权
    Direct memory access rate limiting in a communication device 有权
    通信设备中的直接存储器访问速率限制

    公开(公告)号:US09258257B2

    公开(公告)日:2016-02-09

    申请号:US13738789

    申请日:2013-01-10

    CPC classification number: H04L49/9063 G06F13/28

    Abstract: Rate limiting operations can be implemented at an ingress DMA unit to minimize the probability of dropped packets because of differences between the communication rates of the ingress DMA unit and a packet processing engine. The communication rate associated with each of the software ports of a communication device can be determined and an aggregate software port ingress rate can be calculated by summing the communication rate associated with each of the software ports. The transfer rate associated with the ingress DMA unit can be limited so that packets are transmitted from the ingress DMA unit to the packet processing engine at a communication rate that is at least equal to the aggregate software port ingress rate. If each software port comprises a dedicated rate-limited ingress DMA queue, packets from a rate-limited ingress DMA queue can be transmitted at the at least the communication rate of the corresponding software port.

    Abstract translation: 速率限制操作可以在入口DMA单元处实现,以便由于入口DMA单元和分组处理引擎的通信速率之间的差异而最小化丢弃分组的概率。 可以确定与通信设备的每个软件端口相关联的通信速率,并且可以通过将与每个软件端口相关联的通信速率相加来计算聚合软件端口入口速率。 可以限制与入口DMA单元相关联的传输速率,使得分组以至少等于总软件端口入口速率的通信速率从入口DMA单元传送到分组处理引擎。 如果每个软件端口包括专用的速率限制入口DMA队列,则能够以至少相应软件端口的通信速率发送来自限速入口DMA队列的分组。

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