公开(公告)号：US20230102798A1

公开(公告)日：2023-03-30

申请号：US17448828

申请日：2021-09-24

Applicant: QUALCOMM Incorporated

Inventor： Saurabh LAHOTI ,  Marc HOFFMAN ,  Srijesh SUDARSANAN ,  Hongfeng Dong

IPC: G06F9/30

Abstract: A device includes a processor and a memory configured to store instructions. The processor is configured to receive a particular instruction from among the instructions and to execute the particular instruction to generate first output data corresponding to a sum of first input data and second input data. The processor is also configured to execute the particular instruction to perform a divide operation on the second input data and to generate second output data corresponding to a difference of the first input data and a result of the divide operation.