公开(公告)号：US20220108429A1

公开(公告)日：2022-04-07

申请号：US17065334

申请日：2020-10-07

Applicant: QUALCOMM Incorporated

Inventor： Min LI ,  Ike IKIZYAN ,  Sudeep Ravi KOTTILINGAL ,  Gopikrishnaiah ANDANDAN

IPC: G06T5/00 ,  G06T5/40

Abstract: The present disclosure relates to methods and devices for video or frame processing including an apparatus, e.g., a video or frame processor. In some aspects, the apparatus may receive a video stream including a plurality of frames, each of the plurality of frames including luminance information. The apparatus may also perform a histogram analysis on the luminance information for each of the plurality of frames. Additionally, the apparatus may determine whether a difference between the luminance information for each of the plurality of frames and a current luminance distribution is greater than a perceptual threshold. The apparatus may also calculate an updated tone mapping configuration based on the luminance information for a frame when the difference between the luminance information for the frame and the current luminance distribution is greater than the perceptual threshold.

公开(公告)号：US20190026231A1

公开(公告)日：2019-01-24

申请号：US15658179

申请日：2017-07-24

Applicant: QUALCOMM Incorporated

Inventor： Sudeep Ravi KOTTILINGAL ,  Samar Asbe ,  Vipul Gandhi

IPC: G06F12/1009 ,  G06F12/1027 ,  G06F9/455

Abstract: Various aspects include computing device methods for managed virtual machine memory access. Various aspects may include receiving a memory access request from a managed virtual machine having a virtual address, retrieving a first physical address for a stage 2 page table for a managing virtual machine, in which the stage 2 page table is stored in a physical memory space allocated to a hypervisor, retrieving a second physical address from an entry of the stage 2 page table for a stage 1 page table for a process executed by the managed virtual machine, in which the second physical address is for a physical memory space allocated to the managing virtual machine and the stage 1 page table is stored in that physical memory space, and retrieving a first intermediate physical address from an entry of the stage 1 page table for a translation of the virtual address.