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    ODD EXCEPTION HANDLING TO ACCURATELY CONVERT A SUM OF TWO UNIFORMLY WEIGHTED 2 TO THE (n-1)th POWER BITS WITH A (n-1) BIT ADC
    1.
    发明申请
    ODD EXCEPTION HANDLING TO ACCURATELY CONVERT A SUM OF TWO UNIFORMLY WEIGHTED 2 TO THE (n-1)th POWER BITS WITH A (n-1) BIT ADC 有权

    公开(公告)号：US20250103293A1

    公开(公告)日：2025-03-27

    申请号：US18472519

    申请日：2023-09-22

    Applicant: QUALCOMM Incorporated

    Inventor： Francois Ibrahim ATALLAH ,  Yatharth GUPTA

    IPC: G06F7/544 ,  G06F5/01

    Abstract: A method for multiplication and accumulation includes performing multiplications on a first set of bits and a second set of bits to generate first products, and performing multiplications on a third set of bits and a fourth set of bits to generate second products. The method also includes summing the first products to generate a first sum, changing a bit value of one of the second products, and summing the second products to generate a second sum. The method further includes averaging the first sum and the second sum to obtain an average of the first sum and the second sum, converting the average of the first sum and the second sum into a digital signal, and shifting and adding a one to the digital signal.

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