Dynamic dividing circuit for dividing an input frequency by two
    1.
    发明授权
    Dynamic dividing circuit for dividing an input frequency by two 失效
    用于分两路输入频率的动态分路

    公开(公告)号:US3832651A

    公开(公告)日:1974-08-27

    申请号:US32507173

    申请日:1973-01-19

    Applicant: RCA CORP

    Inventor: NARAYAN S

    CPC classification number: H03L7/24 H03B9/14

    Abstract: A circuit is presented which has the capability of dividing an input frequency by an integer in order to achieve an output frequency within a specified range. This dynamic dividing circuit is capable of multi-gigabit rate operation.

    Abstract translation: 提出了具有将输入频率除以整数的能力的电路,以便实现在指定范围内的输出频率。 这种动态分频电路能够进行多千兆比特率的操作。

    Dynamic dividing circuit for dividing an input frequency by at least three
    2.
    发明授权
    Dynamic dividing circuit for dividing an input frequency by at least three 失效
    用于分三路输入频率的动态分路

    公开(公告)号:US3832652A

    公开(公告)日:1974-08-27

    申请号:US32507273

    申请日:1973-01-19

    Applicant: RCA CORP

    CPC classification number: H03L7/24 H03B9/14

    Abstract: A circuit is presented which has the capability of dividing an input frequency by an integer in order to achieve an output frequency within a specified range. This dynamic dividing circuit is capable of multi-gigabit rate operation.

    Abstract translation: 提出了具有将输入频率除以整数的能力的电路,以便实现在指定范围内的输出频率。 这种动态分频电路能够进行多千兆比特率的操作。

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