On-chip leakage current modeling and measurement circuit
    1.
    发明授权
    On-chip leakage current modeling and measurement circuit 失效
    片内漏电流建模与测量电路

    公开(公告)号:US08473879B2

    公开(公告)日:2013-06-25

    申请号:US13484868

    申请日:2012-05-31

    IPC分类号: G06F17/50

    摘要: At least one N-type transistor and at least one P-type transistor separate from the digital circuit are sized to represent the total area of the corresponding type transistors in the digital circuit. The gates of the N-type transistor and P-type transistors are set to voltages according to the corresponding off-state logic levels of the digital circuit. The N-type and P-type transistors form a portion of corresponding current mirror circuits, which can provide outputs to a leakage current monitor and/or a control circuit such as a comparator that determines when leakage current for the N-type or P-type devices has exceeded a threshold. The output of the measurement/control circuit can be used to determine a temperature of and/or control operation of the digital circuit or the system environment of the integrated circuit.

    摘要翻译: 与数字电路分离的至少一个N型晶体管和至少一个P型晶体管的尺寸被设计为表示数字电路中相应类型晶体管的总面积。 N型晶体管和P型晶体管的栅极根据数字电路的对应截止状态逻辑电平设置为电压。 N型和P型晶体管形成对应的电流镜电路的一部分,其可以向泄漏电流监视器和/或诸如比较器的控制电路提供输出,所述比较器确定N型或P-型晶体管的漏电流, 类型设备已超过阈值。 测量/控制电路的输出可用于确定集成电路的数字电路或系统环境的温度和/或控制操作。