Command reordering for out of order bus transfer
    1.
    发明授权
    Command reordering for out of order bus transfer 有权
    命令重新排序以进行无序的总线传输

    公开(公告)号:US06405267B1

    公开(公告)日:2002-06-11

    申请号:US09236062

    申请日:1999-01-22

    IPC分类号: G06F1300

    CPC分类号: G06F13/4013

    摘要: A system and method for increasing effective bus bandwidth in communicating with a graphics device. Graphics commands and associated parameters are written into a contiguous region of system memory and transmitted in a weakly ordered fashion over a bus to a graphics device. The graphics device reorders the incoming data into the same order as which the data was written into the contiguous region of system memory, thereby allowing the use of order dependent encoded commands with the weakly ordered bus interface.

    摘要翻译: 一种用于在与图形设备通信时增加有效总线带宽的系统和方法。 图形命令和相关参数被写入系统存储器的连续区域中,并以弱排序方式通过总线传输到图形设备。 图形装置将输入的数据重新排列成与数据写入系统存储器的连续区域的顺序相同的顺序,从而允许使用与弱排序总线接口相关的编码命令。

    Shallow trench isolation (STI) with trench liner of increased thickness
    2.
    发明申请
    Shallow trench isolation (STI) with trench liner of increased thickness 审中-公开
    浅沟槽隔离(STI),沟槽衬垫厚度增加

    公开(公告)号:US20070267715A1

    公开(公告)日:2007-11-22

    申请号:US11436503

    申请日:2006-05-18

    IPC分类号: H01L29/00

    CPC分类号: H01L21/76224

    摘要: Improved shallow trench isolation (STI) techniques are provided for semiconductor devices. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a substrate, a first trench in the substrate, and a second trench in the substrate. A first silicon dioxide liner substantially lines the first trench. A second silicon dioxide liner substantially lines the second trench, wherein the second silicon dioxide liner has a thickness greater than a thickness of the first silicon dioxide liner. A silicon nitride liner is on the first silicon dioxide liner in the first trench but not on the second silicon dioxide liner in the second trench. A dielectric material fills the first and second trenches.

    摘要翻译: 为半导体器件提供了改进的浅沟槽隔离(STI)技术。 例如,根据本发明的实施例,集成电路包括衬底,衬底中的第一沟槽和衬底中的第二沟槽。 第一二氧化硅衬垫基本上划线第一沟槽。 第二二氧化硅衬垫基本上线化第二沟槽,其中第二二氧化硅衬垫的厚度大于第一二氧化硅衬垫的厚度。 氮化硅衬垫位于第一沟槽中的第一二氧化硅衬垫上,但不在第二沟槽中的第二二氧化硅衬垫上。 介电材料填充第一和第二沟槽。