Method for fabricating a multilayer epitaxial structure
    1.
    发明授权
    Method for fabricating a multilayer epitaxial structure 失效
    制造多层外延结构的方法

    公开(公告)号:US5324685A

    公开(公告)日:1994-06-28

    申请号:US15384

    申请日:1993-02-09

    IPC分类号: H01L21/22 H01L21/203

    CPC分类号: H01L21/2205 Y10S438/902

    摘要: An all epitaxial process performed entirely in a CVD reactor is employed to grow heavily doped layer on lightly doped layer on a heavily doped substrate, eliminating the need for separate diffusion, even for high impurity concentrations. The process starts with a heavily doped silicon substrate of carrier concentration typically greater than 1.times.10.sup.19 per cm.sup.3. To minimize outdiffusion, the substrate is "capped" by growing very thin and heavily doped silicon layers which are depleted by hydrogen purges. A first epitaxial layer is grown over the "capped" substrate. This layer is relatively lightly doped, having a resistivity of more than 200 ohm.cm. A second epitaxial layer is then grown over the first epitaxial layer. The second epitaxial layer has a polarity opposite to that of the substrate and is heavily doped to a resistivity of less than 0.005 ohm cm.

    摘要翻译: 采用在CVD反应器中完全执行的全部外延工艺来在重掺杂衬底上的轻掺杂层上生长重掺杂层,即使对于高杂质浓度也无需分开扩散。 该过程从载流子浓度通常大于1×1019 / cm3的重掺杂硅衬底开始。 为了最小化扩散,通过生长非常薄且重掺杂的硅层,衬底被“封盖”,其被氢清除耗尽。 在“封盖”基板上生长第一外延层。 该层相对轻掺杂,电阻率大于200欧姆·厘米。 然后在第一外延层上生长第二外延层。 第二外延层具有与衬底相反的极性,并且被重掺杂到小于0.005欧姆厘米的电阻率。