公开(公告)号：US20240170571A1

公开(公告)日：2024-05-23

申请号：US18516760

申请日：2023-11-21

Applicant: Renesas Electronics Corporation

Inventor： Yoshinori HOSHINO ,  Hiroya SHIMOYAMA ,  Toshimune KANBARA ,  Masataka NOMURA

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40

CPC classification number: H01L29/7813 ,  H01L29/0696 ,  H01L29/407

Abstract: A semiconductor device includes a vertical MOSFET in which a trench including a gate electrode and a field plate electrode therebelow at a gate potential and a trench including a gate electrode and a field plate electrode therebelow at a source potential are alternately arranged on an upper surface of a semiconductor substrate in a plan view.