公开(公告)号：US08686885B2

公开(公告)日：2014-04-01

申请号：US13744284

申请日：2013-01-17

Applicant: Renesas Electronics Corporation

Inventor： Tatsuji Matsuura ,  Hideo Nakane ,  Masumi Kasahara ,  Ryuichi Ujiie ,  Keisuke Kimura ,  Oshima Takashi

IPC: H03M1/10

CPC classification number: H03M1/06 ,  H03M1/1038 ,  H03M1/1071 ,  H03M1/123

Abstract: A semiconductor integrated circuit device having A/D converters for converting, by means of digital correction processing, analog input signals into digital signals is reduced in area. The semiconductor integrated circuit device has a first A/D converter and a second A/D converter. In a first mode, a first test signal is inputted to both the first and second A/D converters, and a first correction coefficient for the first A/D converter and a second correction coefficient for the second A/D converter are calculated. In a second mode, the first A/D converter converts a first analog signal into a first digital signal by subjecting the first analog signal to a first digital correction processing and the second A/D converter converts a second analog signal into a second digital signal by subjecting the second analog signal to a second digital correction processing.

Abstract translation: 具有用于通过数字校正处理将模拟输入信号转换成数字信号的A / D转换器的半导体集成电路器件面积减小。 半导体集成电路器件具有第一A / D转换器和第二A / D转换器。 在第一模式中，第一测试信号被输入到第一和第二A / D转换器，并且计算第一A / D转换器的第一校正系数和第二A / D转换器的第二校正系数。 在第二模式中，第一A / D转换器通过对第一模拟信号进行第一数字校正处理而将第一模拟信号转换为第一数字信号，并且第二A / D转换器将第二模拟信号转换为第二数字信号 通过对第二模拟信号进行第二数字校正处理。